--------------------------------------------------------------------------------
Release 6.3i Trace G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.

trce -e 3 -xml system.twx system.ncd system.pcf


Design file:              system.ncd
Physical constraint file: system.pcf
Device,speed:             xc3s400,-4 (PRODUCTION 1.35 2004-11-11)
Report level:             error report

Environment Variable      Effect 
--------------------      ------ 
NONE                      No environment variables were set
--------------------------------------------------------------------------------

INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
   option. All paths that are not constrained will be reported in the
   unconstrained paths section(s) of the report.

================================================================================
Timing constraint: NET "bufgp_71/IBUFG" PERIOD =  20 nS   HIGH 50.000000 % ;

 173551 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
 Minimum period is  19.993ns.
--------------------------------------------------------------------------------


All constraints were met.


Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)

Clock to Setup on destination clock sys_clk_pin
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
sys_clk_pin    |   20.517|         |         |         |
---------------+---------+---------+---------+---------+


Timing summary:
---------------

Timing errors: 0  Score: 0

Constraints cover 173551 paths, 0 nets, and 10891 connections

Design statistics:
   Minimum period:  19.993ns (Maximum frequency:  50.018MHz)


Analysis completed Thu Jul 28 13:35:52 2005
--------------------------------------------------------------------------------

Peak Memory Usage: 76 MB
