Xilinx Platform Studio (XPS)
Xilinx EDK 6.3 Build EDK_Gmm.10

Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.

At GMT date and time: 2005:7:28:4:35:0
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make download; exit;" Started...
Copying Xilinx Implementation tool scripts..
*********************************************
Running Xilinx Implementation tools..
*********************************************
xflow -wd implementation -p XC3S200FT256-4 -implement fast_runtime.opt system.ngc
Release 6.3i - Xflow G.35
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
xflow.exe -wd implementation -p XC3S200FT256-4 -implement fast_runtime.opt
system.ngc  
PM_SPEC -- Xilinx path component is <C:/EDK>

Using Flow File: C:/edk_user_repository/lab1/implementation/fpga.flw 
Using Option File(s): 
 C:/edk_user_repository/lab1/implementation/fast_runtime.opt 
Creating Script File ... 

#----------------------------------------------#
# Starting program ngdbuild
# ngdbuild -p XC3S200FT256-4 -nt timestamp -bm system.bmm
C:/edk_user_repository/lab1/implementation/system.ngc -uc system.ucf system.ngd 
#----------------------------------------------#
Release 6.3i - ngdbuild G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
PM_SPEC -- Xilinx path component is <C:/EDK>

Command Line: ngdbuild -p XC3S200FT256-4 -nt timestamp -bm system.bmm -uc
system.ucf C:/edk_user_repository/lab1/implementation/system.ngc system.ngd 

Reading NGO file "C:/edk_user_repository/lab1/implementation/system.ngc" ...
Reading component libraries for design expansion...
Loading design module
"C:/edk_user_repository/lab1/implementation/microblaze_0_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/mb_opb_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/debug_module_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/ilmb_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/dlmb_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/dlmb_cntlr_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/ilmb_cntlr_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/lmb_bram_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/rs232_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/leds_8bit_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/push_buttons_3bit_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/sram_256kx32_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/opb_bram_if_cntlr_1_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/opb_bram_if_cntlr_1_bram_wrapper.ngc
"...
Loading design module
"C:/edk_user_repository/lab1/implementation/opb_timer_1_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/opb_intc_0_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/sram_256kx32_util_bus_split_0_wrappe
r.ngc"...

Annotating constraints to design from file "system.ucf" ...
ERROR:NgdBuild:755 - Line 27 in 'system.ucf': Could not find net(s) 'ssg<0>' in
   the design.  To suppress this error specify the correct net name or remove
   the constraint.  The 'Ignore I\O constraints on Invalid Object Names'
   property can also be set ( -aul switch for command line users).
ERROR:NgdBuild:755 - Line 28 in 'system.ucf': Could not find net(s) 'ssg<1>' in
   the design.  To suppress this error specify the correct net name or remove
   the constraint.  The 'Ignore I\O constraints on Invalid Object Names'
   property can also be set ( -aul switch for command line users).
ERROR:NgdBuild:755 - Line 29 in 'system.ucf': Could not find net(s) 'ssg<2>' in
   the design.  To suppress this error specify the correct net name or remove
   the constraint.  The 'Ignore I\O constraints on Invalid Object Names'
   property can also be set ( -aul switch for command line users).
ERROR:NgdBuild:755 - Line 30 in 'system.ucf': Could not find net(s) 'ssg<3>' in
   the design.  To suppress this error specify the correct net name or remove
   the constraint.  The 'Ignore I\O constraints on Invalid Object Names'
   property can also be set ( -aul switch for command line users).
ERROR:NgdBuild:755 - Line 31 in 'system.ucf': Could not find net(s) 'ssg<4>' in
   the design.  To suppress this error specify the correct net name or remove
   the constraint.  The 'Ignore I\O constraints on Invalid Object Names'
   property can also be set ( -aul switch for command line users).
ERROR:NgdBuild:755 - Line 32 in 'system.ucf': Could not find net(s) 'ssg<5>' in
   the design.  To suppress this error specify the correct net name or remove
   the constraint.  The 'Ignore I\O constraints on Invalid Object Names'
   property can also be set ( -aul switch for command line users).
ERROR:NgdBuild:755 - Line 33 in 'system.ucf': Could not find net(s) 'ssg<6>' in
   the design.  To suppress this error specify the correct net name or remove
   the constraint.  The 'Ignore I\O constraints on Invalid Object Names'
   property can also be set ( -aul switch for command line users).
ERROR:NgdBuild:755 - Line 34 in 'system.ucf': Could not find net(s) 'ssg<7>' in
   the design.  To suppress this error specify the correct net name or remove
   the constraint.  The 'Ignore I\O constraints on Invalid Object Names'
   property can also be set ( -aul switch for command line users).
ERROR:NgdBuild:755 - Line 38 in 'system.ucf': Could not find net(s) 'an<0>' in
   the design.  To suppress this error specify the correct net name or remove
   the constraint.  The 'Ignore I\O constraints on Invalid Object Names'
   property can also be set ( -aul switch for command line users).
ERROR:NgdBuild:755 - Line 39 in 'system.ucf': Could not find net(s) 'an<1>' in
   the design.  To suppress this error specify the correct net name or remove
   the constraint.  The 'Ignore I\O constraints on Invalid Object Names'
   property can also be set ( -aul switch for command line users).
ERROR:NgdBuild:755 - Line 40 in 'system.ucf': Could not find net(s) 'an<2>' in
   the design.  To suppress this error specify the correct net name or remove
   the constraint.  The 'Ignore I\O constraints on Invalid Object Names'
   property can also be set ( -aul switch for command line users).
ERROR:NgdBuild:755 - Line 41 in 'system.ucf': Could not find net(s) 'an<3>' in
   the design.  To suppress this error specify the correct net name or remove
   the constraint.  The 'Ignore I\O constraints on Invalid Object Names'
   property can also be set ( -aul switch for command line users).
ERROR:Parsers:11 - Encountered unrecognized constraint while parsing.
ERROR:NgdBuild:19 - Errors found while parsing constraint file "system.ucf".

Writing NGDBUILD log file "system.bld"...
ERROR:Xflow - Program ngdbuild returned error code -1. Aborting flow
   execution... 
make: *** [implementation/system.bit] Error 1
Done.
WARNING:Portability:111 - Message file "MDT.msg" wasn't found.
Assigned Driver gpio 2.00.a for instance opb_gpio_0
Assigned Driver gpio 2.00.a for instance opb_gpio_1

Saving MSS changes, if any.

Loading Project File..
Synchronization Done.
At GMT date and time: 2005:7:28:4:45:47
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make download; exit;" Started...
****************************************************
Creating system netlist for hardware specification..
****************************************************
platgen -p XC3S200FT256-4 -lang vhdl   -st xst system.mhs

Release Xilinx EDK 6.3 - platgen EDK_Gmm.10
Copyright (c) 1995-2003 Xilinx, Inc.  All rights reserved.

PM_SPEC -- Xilinx path component is <C:/EDK>

Command Line: platgen -p XC3S200FT256-4 -lang vhdl -st xst system.mhs 

Parse system.mhs ...

Read MPD definitions ...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_v20_v1_10_b/data/opb_v20_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v1_00_b/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_emc_v1_10_b/data/opb_emc_v2_1_0.tcl
...Done

Overriding IP level properties ...
opb_timer (opb_timer_1) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_timer_v1_00_b\data\opb_timer_v2_1_0.mp
d:31 - overriding c_family value virtex2 to spartan3
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
32 - overriding c_family value virtex2 to spartan3
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to spartan3
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:55 - overriding c_family value virtex2 to spartan3
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:56 - overriding c_instance value microblaze to microblaze_0
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to spartan3
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd:37
- overriding c_family value virtex2 to spartan3
opb_gpio (push_buttons_3bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (leds_8bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (led_cathodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (led_anodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3

Performing IP level DRCs on properties...

Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/emc_common_v2_00_a/data/emc_common_v2_1_0.
tcl ...
Done
Address Map for Processor microblaze_0
  (0x00000000-0x00001fff) dlmb_cntlr	dlmb
  (0x00000000-0x00001fff) ilmb_cntlr	ilmb
  (0x80200000-0x802000ff) opb_timer_1	mb_opb
  (0x80200100-0x802001ff) opb_intc_0	mb_opb
  (0x80200200-0x802002ff) debug_module	mb_opb
  (0x80200300-0x802003ff) RS232	mb_opb
  (0x80200400-0x802005ff) SRAM_256Kx32	mb_opb
  (0x80200600-0x802007ff) Push_Buttons_3Bit	mb_opb
  (0x80200800-0x802009ff) LEDs_8Bit	mb_opb
  (0x80200a00-0x80200bff) LED_cathodes	mb_opb
  (0x80200c00-0x80200dff) LED_anodes	mb_opb
  (0x80202000-0x80203fff) opb_bram_if_cntlr_1	mb_opb
  (0x80300000-0x803fffff) SRAM_256Kx32	mb_opb

Check platform configuration ...
opb_v20 (mb_opb) - C:\edk_user_repository\lab1\system.mhs:100 - 2 master(s) : 10
slave(s)
lmb_v10 (ilmb) - C:\edk_user_repository\lab1\system.mhs:124 - 1 master(s) : 1
slave(s)
lmb_v10 (dlmb) - C:\edk_user_repository\lab1\system.mhs:141 - 1 master(s) : 1
slave(s)

Check port drivers...

Check platform address map ...

Overriding system level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
41 - overriding c_kind_of_intr value 11111111111111111111111111111111 to
0b00000000000000000000000000000010
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
42 - overriding c_kind_of_edge value 11111111111111111111111111111111 to
0b00000000000000000000000000000010
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
43 - overriding c_kind_of_lvl value 11111111111111111111111111111111 to
0b00000000000000000000000000000001
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:34 - overriding c_memsize value 2048 to 8192
opb_v20 (mb_opb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_v20_v1_10_b\data\opb_v20_v2_1_0.mpd:39
- overriding c_num_masters value 4 to 2
opb_v20 (mb_opb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_v20_v1_10_b\data\opb_v20_v2_1_0.mpd:40
- overriding c_num_slaves value 4 to 10
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:34 - overriding c_memsize value 2048 to 8192
lmb_bram_if_cntlr (ilmb_cntlr) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_bram_if_cntlr_v1_00_b\data\lmb_bram_if
_cntlr_v2_1_0.mpd:41 - overriding c_mask value 0x00800000 to
0b00000000001000000000000000000000
lmb_v10 (ilmb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_v10_v1_00_a\data\lmb_v10_v2_1_0.mpd:35
- overriding c_lmb_num_slaves value 4 to 1
lmb_bram_if_cntlr (dlmb_cntlr) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_bram_if_cntlr_v1_00_b\data\lmb_bram_if
_cntlr_v2_1_0.mpd:41 - overriding c_mask value 0x00800000 to
0b00000000001000000000000000000000
lmb_v10 (dlmb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_v10_v1_00_a\data\lmb_v10_v2_1_0.mpd:35
- overriding c_lmb_num_slaves value 4 to 1

Running DRC Tcl procedures for OPTION SYSLEVEL_DRC_PROC...

Performing System level DRCs on properties...

Running UPDATE Tcl procedures for OPTION PLATGEN_SYSLEVEL_UPDATE_PROC...

Modify defaults ...

Performing XLPP processing on licensed instances ...
Completion time: 0.00 seconds

Creating hardware output directories ...

Managing hardware (BBD-specified) netlist files ...

Managing cache ...
opb_timer (opb_timer_1) - C:\edk_user_repository\lab1\system.mhs:40 - Copying
cache implementation netlist
opb_intc (opb_intc_0) - C:\edk_user_repository\lab1\system.mhs:52 - Copying
cache implementation netlist
bram_block (opb_bram_if_cntlr_1_bram) -
C:\edk_user_repository\lab1\system.mhs:62 - Copying cache implementation netlist
opb_bram_if_cntlr (opb_bram_if_cntlr_1) -
C:\edk_user_repository\lab1\system.mhs:68 - Copying cache implementation netlist
microblaze (microblaze_0) - C:\edk_user_repository\lab1\system.mhs:79 - Copying
cache implementation netlist
bram_block (lmb_bram) - C:\edk_user_repository\lab1\system.mhs:108 - Copying
cache implementation netlist
lmb_bram_if_cntlr (ilmb_cntlr) - C:\edk_user_repository\lab1\system.mhs:115 -
Copying cache implementation netlist
lmb_v10 (ilmb) - C:\edk_user_repository\lab1\system.mhs:124 - Copying cache
implementation netlist
lmb_bram_if_cntlr (dlmb_cntlr) - C:\edk_user_repository\lab1\system.mhs:132 -
Copying cache implementation netlist
lmb_v10 (dlmb) - C:\edk_user_repository\lab1\system.mhs:141 - Copying cache
implementation netlist
opb_mdm (debug_module) - C:\edk_user_repository\lab1\system.mhs:149 - Copying
cache implementation netlist
util_bus_split (sram_256kx32_util_bus_split_0) -
C:\edk_user_repository\lab1\system.mhs:167 - Copying cache implementation
netlist
opb_emc (sram_256kx32) - C:\edk_user_repository\lab1\system.mhs:177 - Copying
cache implementation netlist
opb_uartlite (rs232) - C:\edk_user_repository\lab1\system.mhs:202 - Copying
cache implementation netlist
opb_gpio (push_buttons_3bit) - C:\edk_user_repository\lab1\system.mhs:219 -
Copying cache implementation netlist
opb_gpio (leds_8bit) - C:\edk_user_repository\lab1\system.mhs:233 - Copying
cache implementation netlist

Elaborating instances ...
bram_block (opb_bram_if_cntlr_1_bram) -
C:\edk_user_repository\lab1\system.mhs:62 - elaborating IP
bram_block (lmb_bram) - C:\edk_user_repository\lab1\system.mhs:108 - elaborating
IP

Writing HDL for elaborated instances ...

Inserting wrapper level ...
Completion time: 7.00 seconds

Constructing platform-level signal connectivity ...
Completion time: 5.00 seconds

Writing (top-level) BMM ...
Writing BMM - C:\edk_user_repository\lab1\implementation\system.bmm

Writing (top-level and wrappers) HDL ...

Generating synthesis project file ...

Running XST synthesis ...
INFO:MDT - The following instances are synthesized with XST. The MPD option
   IMP_NETLIST=TRUE indicates that a NGC file is to be produced using XST
   synthesis. IMP_NETLIST=FALSE (default) instances are not synthesized. A batch
   file, synthesis.sh, has been created that allows you to synthesize those
   instances in your specified synthesis tool of choice.
mb_opb_wrapper (mb_opb) - C:\edk_user_repository\lab1\system.mhs:100 - Running
XST synthesis
led_cathodes_wrapper (led_cathodes) - C:\edk_user_repository\lab1\system.mhs:247
- Running XST synthesis
led_anodes_wrapper (led_anodes) - C:\edk_user_repository\lab1\system.mhs:261 -
Running XST synthesis

Running NGCBUILD ...

Rebuilding cache ...
Total run time: 62.00 seconds
Running synthesis...
bash -c "cd synthesis; ./synthesis.sh; cd .."
Release 6.3i - xst G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
--> PM_SPEC -- Xilinx path component is <C:/EDK>

TABLE OF CONTENTS
  1) Synthesis Options Summary
  2) HDL Compilation
  3) HDL Analysis
  4) HDL Synthesis
  5) Advanced HDL Synthesis
     5.1) HDL Synthesis Report
  6) Low Level Synthesis
  7) Final Report
     7.1) Device utilization summary
     7.2) TIMING REPORT


=========================================================================
*                      Synthesis Options Summary                        *
=========================================================================
---- Source Parameters
Input Format                       : MIXED
Input File Name                    : system_xst.prj

---- Target Parameters
Target Device                      : XC3S200FT256-4
Output File Name                   : ../implementation/system.ngc

---- Source Options
Top Module Name                    : system

---- Target Options
Add IO Buffers                     : NO

---- General Options
Optimization Effort                : 2
Optimization Goal                  : speed
RTL Output                         : YES
Hierarchy Separator                : /

=========================================================================


=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd in Library work.
Entity <system> (Architecture <STRUCTURE>) compiled.

=========================================================================
*                            HDL Analysis                               *
=========================================================================
Analyzing Entity <system> (Architecture <STRUCTURE>).
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1659: Generating a Black Box for component <IBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1665: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1671: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1677: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1683: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1689: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1695: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1701: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1707: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1713: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1719: Generating a Black Box for component <IBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1725: Generating a Black Box for component <IBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1731: Generating a Black Box for component <IBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1737: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1743: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1749: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1755: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1761: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1767: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1773: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1779: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1785: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1791: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1797: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1803: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1809: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1815: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1821: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1827: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1833: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1839: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1845: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1853: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1861: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1869: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1877: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1885: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1893: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1901: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1909: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1917: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1925: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1933: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1941: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1949: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1957: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1965: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1973: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1981: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1989: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1997: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2005: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2013: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2021: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2029: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2037: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2045: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2053: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2061: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2069: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2077: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2085: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2093: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2101: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2107: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2113: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2119: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2125: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2131: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2137: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2143: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2149: Generating a Black Box for component <BUFGP>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2155: Generating a Black Box for component <IBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2161: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2167: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2173: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2179: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2185: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2191: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2197: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2203: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2209: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2215: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2221: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2227: Generating a Black Box for component <OBUF>.
Entity <system> analyzed. Unit <system> generated.


=========================================================================
*                           HDL Synthesis                               *
=========================================================================

Synthesizing Unit <system>.
    Related source file is c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd.
Unit <system> synthesized.

=========================================================================
*                       Advanced HDL Synthesis                          *
=========================================================================

Advanced RAM inference ...
Advanced multiplier inference ...
Advanced Registered AddSub inference ...
Dynamic shift register inference ...

=========================================================================
HDL Synthesis Report

Found no macro
=========================================================================

=========================================================================
*                         Low Level Synthesis                           *
=========================================================================

Optimizing unit <system> ...
Loading device for application Xst from file '3s200.nph' in environment C:/Xilinx.

Mapping all equations...
Building and optimizing final netlist ...

=========================================================================
*                            Final Report                               *
=========================================================================
Final Results
RTL Top Level Output File Name     : ../implementation/system.ngr
Top Level Output File Name         : ../implementation/system.ngc
Output Format                      : ngc
Optimization Goal                  : speed
Keep Hierarchy                     : no

Design Statistics
# IOs                              : 85

Cell Usage :
# BELS                             : 2
#      GND                         : 1
#      VCC                         : 1
# Clock Buffers                    : 1
#      BUFGP                       : 1
# IO Buffers                       : 84
#      IBUF                        : 5
#      IOBUF                       : 32
#      OBUF                        : 47
# Others                           : 19
#      debug_module_wrapper        : 1
#      dlmb_cntlr_wrapper          : 1
#      dlmb_wrapper                : 1
#      ilmb_cntlr_wrapper          : 1
#      ilmb_wrapper                : 1
#      led_anodes_wrapper          : 1
#      led_cathodes_wrapper        : 1
#      leds_8bit_wrapper           : 1
#      lmb_bram_wrapper            : 1
#      mb_opb_wrapper              : 1
#      microblaze_0_wrapper        : 1
#      opb_bram_if_cntlr_1_bram_wrapper: 1
#      opb_bram_if_cntlr_1_wrapper : 1
#      opb_intc_0_wrapper          : 1
#      opb_timer_1_wrapper         : 1
#      push_buttons_3bit_wrapper   : 1
#      rs232_wrapper               : 1
#      sram_256kx32_util_bus_split_0_wrapper: 1
#      sram_256kx32_wrapper        : 1
=========================================================================

Device utilization summary:
---------------------------

Selected Device : 3s200ft256-4 

 Number of bonded IOBs:                 84  out of    173    48%  
 Number of GCLKs:                        1  out of      8    12%  


=========================================================================
TIMING REPORT

NOTE: THESE TIMING NUMBERS ARE ONLY A SYNTHESIS ESTIMATE.
      FOR ACCURATE TIMING INFORMATION PLEASE REFER TO THE TRACE REPORT
      GENERATED AFTER PLACE-and-ROUTE.

Clock Information:
------------------
No clock signals found in this design

Timing Summary:
---------------
Speed Grade: -4

   Minimum period: No path found
   Minimum input arrival time before clock: No path found
   Maximum output required time after clock: No path found
   Maximum combinational path delay: 5.358ns

Timing Detail:
--------------
All values displayed in nanoseconds (ns)

-------------------------------------------------------------------------
Timing constraint: Default path analysis
Delay:               5.358ns (Levels of Logic = 1)
  Source:            sram_256kx32:Mem_DQ_T<27> (PAD)
  Destination:       fpga_0_SRAM_256Kx32_Mem_DQ_pin<27> (PAD)

  Data Path: sram_256kx32:Mem_DQ_T<27> to fpga_0_SRAM_256Kx32_Mem_DQ_pin<27>
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
    sram_256kx32_wrapper:Mem_DQ_T<27>    1   0.000   0.240  sram_256kx32 (fpga_0_SRAM_256Kx32_Mem_DQ_T<27>)
     IOBUF:T->IO               5.118          iobuf_58 (fpga_0_SRAM_256Kx32_Mem_DQ_pin<27>)
    ----------------------------------------
    Total                      5.358ns (5.118ns logic, 0.240ns route)
                                       (95.5% logic, 4.5% route)

=========================================================================
CPU : 12.00 / 14.06 s | Elapsed : 12.00 / 13.00 s
 
--> 

Total memory usage is 74488 kilobytes


Copying Xilinx Implementation tool scripts..
*********************************************
Running Xilinx Implementation tools..
*********************************************
xflow -wd implementation -p XC3S200FT256-4 -implement fast_runtime.opt system.ngc
Release 6.3i - Xflow G.35
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
xflow.exe -wd implementation -p XC3S200FT256-4 -implement fast_runtime.opt
system.ngc  
PM_SPEC -- Xilinx path component is <C:/EDK>

Using Flow File: C:/edk_user_repository/lab1/implementation/fpga.flw 
Using Option File(s): 
 C:/edk_user_repository/lab1/implementation/fast_runtime.opt 

Creating Script File ... 

#----------------------------------------------#
# Starting program ngdbuild
# ngdbuild -p XC3S200FT256-4 -nt timestamp -bm system.bmm
C:/edk_user_repository/lab1/implementation/system.ngc -uc system.ucf system.ngd 
#----------------------------------------------#
Release 6.3i - ngdbuild G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
PM_SPEC -- Xilinx path component is <C:/EDK>

Command Line: ngdbuild -p XC3S200FT256-4 -nt timestamp -bm system.bmm -uc
system.ucf C:/edk_user_repository/lab1/implementation/system.ngc system.ngd 

Reading NGO file "C:/edk_user_repository/lab1/implementation/system.ngc" ...
Reading component libraries for design expansion...
Loading design module
"C:/edk_user_repository/lab1/implementation/opb_timer_1_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/opb_intc_0_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/opb_bram_if_cntlr_1_bram_wrapper.ngc
"...
Loading design module
"C:/edk_user_repository/lab1/implementation/opb_bram_if_cntlr_1_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/microblaze_0_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/mb_opb_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/lmb_bram_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/ilmb_cntlr_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/ilmb_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/dlmb_cntlr_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/dlmb_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/debug_module_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/sram_256kx32_util_bus_split_0_wrappe
r.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/sram_256kx32_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/rs232_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/push_buttons_3bit_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/leds_8bit_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/led_cathodes_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/led_anodes_wrapper.ngc"...

Annotating constraints to design from file "system.ucf" ...

Checking timing specifications ...

Processing BMM file ...

Checking expanded design ...
WARNING:NgdBuild:443 - SFF primitive 'opb_timer_1/opb_timer_1/SEQADDR_FF_I' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'opb_timer_1/opb_timer_1/ABUS_FF_I24' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'opb_timer_1/opb_timer_1/ABUS_FF_I25' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'opb_timer_1/opb_timer_1/ABUS_FF_I30' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'opb_timer_1/opb_timer_1/ABUS_FF_I31' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I11' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I10' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I8' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I7' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I6' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I5' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I4' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I3' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I2' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I1' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I0' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I20' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I19' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I16' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I15' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I17' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I18' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I12' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I9' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I12' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I14' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I13' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I9' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I10' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I11' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I8' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I3' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I4' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I5' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I6' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I7' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I2' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I0' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I1' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I13' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I18' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I19' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I16' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I17' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I14' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I15' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I20' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_ABUS_REG_BIT_I24' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_ABUS_REG_BIT_I25' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_ABUS_REG_BIT_I26' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_ABUS_REG_BIT_I30' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_ABUS_REG_BIT_I31' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I0' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I1' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I2' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I3' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I4' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I5' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I6' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I7' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I8' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I9' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I10' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I11' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I12' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I13' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I14' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I15' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I16' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I17' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I18' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I19' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I20' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I21' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I22' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I23' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I24' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I25' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I26' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I27' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I28' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I29' has unconnected
   output pin
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<11>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<10>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<9>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<8>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<7>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<6>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<5>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<4>' has no
   load
WARNING:NgdBuild:454 - logical net 'net_vcc2<1>' has no load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<3>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<2>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<1>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<0>' has no
   load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<0>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<1>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<2>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<3>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<4>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<5>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<6>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<7>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<8>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<9>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<10>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<11>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<12>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<13>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<14>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<15>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<16>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<17>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<18>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<19>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<20>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<21>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<22>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<23>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<24>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<25>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<26>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<27>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<28>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<29>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<30>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<31>' has
   no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<0>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_AS' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Write' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Read' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<31>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<30>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<29>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<28>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<27>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<26>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<25>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<24>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<23>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<22>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<21>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<20>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<19>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_WRITE' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<18>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_ADDR<0>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<17>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<16>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<15>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<14>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<13>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<12>' has no
   load
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Iopb_Interface_I/Iopb_Interrupt' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<11>' has no
   load
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Dopb_Interface_I/Dopb_Interrupt' has no load
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/PC_Module_I/PC_Bit_I0/Carry_Out' has
   no load
WARNING:NgdBuild:452 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/word_r1_r2_unalignment' has no driver
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/word_r1_r2_unalignment' has no load
WARNING:NgdBuild:452 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/word_r1_imm_unalignment' has no driver
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/word_r1_imm_unalignment' has no load
WARNING:NgdBuild:452 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/halfword_unalignment' has no driver
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/halfword_unalignment' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<6>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<5>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<10>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<9>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<8>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<7>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<4>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<3>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<2>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<1>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<0>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_ADDR<4>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_ADDR<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_ADDR<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_ADDR<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<9>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<8>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<7>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<6>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<5>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<4>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PREFETCH_ADDR<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PREFETCH_ADDR<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PREFETCH_ADDR<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<31>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<30>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<29>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<28>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<27>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<26>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<25>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<24>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<23>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<22>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<21>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<20>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<19>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<18>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<17>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<16>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<15>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<14>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<13>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<12>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<11>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<10>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<9>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<8>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<7>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<6>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<5>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<4>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/INTERRUPT_TAKEN' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<6>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<0>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Branch_Instr' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<17>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<8>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<9>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<10>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<22>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<31>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<11>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<12>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<13>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<14>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<7>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<16>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<15>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<19>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<18>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<21>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<20>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<28>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<27>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<24>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<23>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<29>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MB_Halted' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_hwXfer' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_fwXfer' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_dwXfer' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_toutSup' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<0>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_beXfer' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<31>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<30>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<29>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<28>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<27>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<26>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<25>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<24>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<23>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<22>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<21>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<20>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<19>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<18>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<17>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<16>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<15>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<14>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<13>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<12>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<11>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<10>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<9>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<8>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<7>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<6>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<5>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<4>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<3>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<2>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<1>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_dwAck' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_beAck' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_hwAck' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_fwAck' has no load
WARNING:NgdBuild:454 - logical net 'debug_module/bscan_drck1' has no load
WARNING:NgdBuild:478 - clock net 'debug_module/bscan_drck1' drives no clock pins
WARNING:NgdBuild:454 - logical net 'debug_module/bscan_reset' has no load
WARNING:NgdBuild:454 - logical net 'debug_module/bscan_sel1' has no load
WARNING:NgdBuild:454 - logical net 'debug_module/Interrupt' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_QWEN<2>' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_QWEN<1>' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_QWEN<3>' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_RNW' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_CE<0>' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_RPN' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_QWEN<0>' has no load
WARNING:NgdBuild:454 - logical net 'push_buttons_3bit/GPIO_IO_T<2>' has no load

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings: 304

Total memory usage is 57448 kilobytes

Writing NGD file "system.ngd" ...

Writing NGDBUILD log file "system.bld"...

NGDBUILD done.



#----------------------------------------------#
# Starting program map
# map -o system_map.ncd -pr b system.ngd system.pcf 
#----------------------------------------------#
Release 6.3i - Map G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
PM_SPEC -- Xilinx path component is <C:/EDK>
Using target part "3s200ft256-4".
Removing unused or disabled logic...
Running cover...
Writing file system_map.ngm...
Running directed packing...
Running delay-based LUT packing...
Running related packing...
Writing design file "system_map.ncd"...

Design Summary:
Number of errors:      0
Number of warnings:   71
Logic Utilization:
  Number of Slice Flip Flops:       1,731 out of   3,840   45%
  Number of 4 input LUTs:           2,089 out of   3,840   54%
Logic Distribution:
  Number of occupied Slices:                        1,784 out of   1,920   92%
    Number of Slices containing only related logic:   1,784 out of   1,784  100%
    Number of Slices containing unrelated logic:          0 out of   1,784    0%
      *See NOTES below for an explanation of the effects of unrelated logic
Total Number 4 input LUTs:          2,550 out of   3,840   66%
  Number used as logic:              2,089
  Number used as a route-thru:          44
  Number used for Dual Port RAMs:      256
    (Two LUTs used per Dual Port RAM)
  Number used as Shift registers:      161
  Number of bonded IOBs:               85 out of     173   49%
    IOB Flip Flops:                    81
  Number of Block RAMs:                8 out of      12   66%
  Number of MULT18X18s:                3 out of      12   25%
  Number of GCLKs:                     2 out of       8   25%
  Number of BSCANs:                    1 out of       1  100%

   Number of RPM macros:            5
Total equivalent gate count for design:  592,442
Additional JTAG gate count for IOBs:  4,080
Peak Memory Usage:  93 MB

NOTES:

   Related logic is defined as being logic that shares connectivity -
   e.g. two LUTs are "related" if they share common inputs.
   When assembling slices, Map gives priority to combine logic that
   is related.  Doing so results in the best timing performance.

   Unrelated logic shares no connectivity.  Map will only begin
   packing unrelated logic into a slice once 99% of the slices are
   occupied through related logic packing.

   Note that once logic distribution reaches the 99% level through
   related logic packing, this does not mean the device is completely
   utilized.  Unrelated logic packing will then begin, continuing until
   all usable LUTs and FFs are occupied.  Depending on your timing
   budget, increased levels of unrelated logic packing may adversely
   affect the overall timing performance of your design.


Mapping completed.
See MAP report file "system_map.mrp" for details.



#----------------------------------------------#
# Starting program par
# par -w -ol std system_map.ncd system.ncd system.pcf 
#----------------------------------------------#
Release 6.3i - Par G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.


PM_SPEC -- Xilinx path component is <C:/EDK>


Constraints file: system.pcf

Loading device database for application Par from file "system_map.ncd".
   "system" is an NCD, version 2.38, device xc3s200, package ft256, speed -4
Loading device for application Par from file '3s200.nph' in environment
C:/Xilinx.
Device speed data version:  PRODUCTION 1.35 2004-11-11.


Resolving physical constraints.
Finished resolving physical constraints.

Device utilization summary:

   Number of External IOBs            85 out of 173    49%
      Number of LOCed External IOBs   85 out of 85    100%

   Number of MULT18X18s                3 out of 12     25%
   Number of RAMB16s                   8 out of 12     66%
   Number of Slices                 1784 out of 1920   92%
      Number of SLICEMs              321 out of 960    33%

   Number of BSCANs                    1 out of 1     100%
   Number of BUFGMUXs                  2 out of 8      25%



Overall effort level (-ol):   Standard (set by user)
Placer effort level (-pl):    Standard (set by user)
Placer cost table entry (-t): 1
Router effort level (-rl):    Standard (set by user)

Starting initial Timing Analysis.  REAL time: 2 secs 
Finished initial Timing Analysis.  REAL time: 5 secs 


Phase 1.1
Phase 1.1 (Checksum:98eef3) REAL time: 6 secs 
.
Phase 3.8
....................
.......
Phase 3.8 (Checksum:be8450) REAL time: 14 secs 

Phase 4.5
Phase 4.5 (Checksum:26259fc) REAL time: 14 secs 

Phase 5.18
Phase 5.18 (Checksum:2faf07b) REAL time: 22 secs 

Writing design to file system.ncd.

Total REAL time to Placer completion: 24 secs 
Total CPU time to Placer completion: 22 secs 

Phase 1: 13699 unrouted;       REAL time: 24 secs 

Phase 2: 11701 unrouted;       REAL time: 25 secs 
Phase 3: 6091 unrouted;       REAL time: 29 secs 
Phase 4: 6091 unrouted; (0)      REAL time: 30 secs 

Phase 5: 6091 unrouted; (0)      REAL time: 31 secs 
Phase 6: 6091 unrouted; (0)      REAL time: 32 secs 
Phase 7: 0 unrouted; (0)      REAL time: 55 secs 
Total REAL time to Router completion: 57 secs 
Total CPU time to Router completion: 56 secs 

Generating "par" statistics.

**************************
Generating Clock Report
**************************

+-------------------------+----------+------+------+------------+-------------+
|        Clock Net        | Resource |Locked|Fanout|Net Skew(ns)|Max Delay(ns)|
+-------------------------+----------+------+------+------------+-------------+
|         DBG_CLK_s       |  BUFGMUX7| No   |  140 |  0.003     |  1.013      |
+-------------------------+----------+------+------+------------+-------------+
|dlmb_port_BRAM_Clk       |  BUFGMUX0| No   | 1233 |  0.043     |  1.053      |
+-------------------------+----------+------+------+------------+-------------+
|debug_module/bscan_updat |          |      |      |            |             |
|                       e |   Local  |      |    1 |  0.000     |  2.255      |
+-------------------------+----------+------+------+------------+-------------+
|opb_intc_0/opb_intc_0/IN |          |      |      |            |             |
|TC_CORE_I/INTR_DET_I/int |          |      |      |            |             |
|              errupts<1> |   Local  |      |    1 |  0.000     |  1.694      |
+-------------------------+----------+------+------+------------+-------------+
Timing Score: 0
Asterisk (*) preceding a constraint indicates it was not met.
   This may be due to a setup or hold violation.

--------------------------------------------------------------------------------
  Constraint                                | Requested  | Actual     | Logic 
                                            |            |            | Levels
--------------------------------------------------------------------------------
  NET "bufgp_71/IBUFG" PERIOD =  20 nS   HI | 20.000ns   | 19.837ns   | 15   
  GH 50.000000 %                            |            |            |      
--------------------------------------------------------------------------------


All constraints were met.
Generating Pad Report.

All signals are completely routed.

Total REAL time to PAR completion: 1 mins 2 secs 
Total CPU time to PAR completion: 1 mins 1 secs 

Peak Memory Usage:  104 MB

Placement: Completed - No errors found.
Routing: Completed - No errors found.
Timing: Completed - No errors found.

Writing design to file system.ncd.


PAR done.



#----------------------------------------------#
# Starting program post_par_trce
# trce -e 3 -xml system.twx system.ncd system.pcf 
#----------------------------------------------#
Release 6.3i - Trace G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.



Loading device database for application trce from file "system.ncd".
PM_SPEC -- Xilinx path component is <C:/EDK>
   "system" is an NCD, version 2.38, device xc3s200, package ft256, speed -4
Loading device for application trce from file '3s200.nph' in environment
C:/Xilinx.
--------------------------------------------------------------------------------
Release 6.3i Trace G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.

trce -e 3 -xml system.twx system.ncd system.pcf


Design file:              system.ncd
Physical constraint file: system.pcf
Device,speed:             xc3s200,-4 (PRODUCTION 1.35 2004-11-11)
Report level:             error report
--------------------------------------------------------------------------------

INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
   option. All paths that are not constrained will be reported in the
   unconstrained paths section(s) of the report.


Timing summary:
---------------

Timing errors: 0  Score: 0

Constraints cover 187811 paths, 0 nets, and 12065 connections

Design statistics:
   Minimum period:  19.837ns (Maximum frequency:  50.411MHz)


Analysis completed Thu Jul 28 12:49:15 2005
--------------------------------------------------------------------------------

Generating Report ...

Total time: 7 secs 
xflow done!
cd implementation; bitgen -w -f bitgen.ut system
Release 6.3i - Bitgen G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.

Loading device database for application Bitgen from file "system.ncd".
PM_SPEC -- Xilinx path component is <C:/EDK>
   "system" is an NCD, version 2.38, device xc3s200, package ft256, speed -4
Loading device for application Bitgen from file '3s200.nph' in environment
C:/Xilinx.
Opened constraints file system.pcf.

Thu Jul 28 12:49:18 2005

Running DRC.
WARNING:DesignRules:372 - Netcheck: Gated clock. Clock net
   opb_intc_0/opb_intc_0/INTC_CORE_I/INTR_DET_I/interrupts<1> is sourced by a
   combinatorial pin. This is not good design practice. Use the CE pin to
   control the loading of data into the flip-flop.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I31/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I29/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I27/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I25/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I23/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I21/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I19/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I17/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I15/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I13/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I11/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I9/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I7/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I5/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I3/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I1/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I31/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I29/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I27/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I25/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I23/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I21/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I19/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I17/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I15/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I13/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I11/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I9/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I7/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I5/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I3/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I1/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I30/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I28/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I26/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I24/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I22/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I20/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I18/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I16/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I14/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I12/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I10/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I8/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I6/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I4/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I2/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I0/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I30/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I28/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I26/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I24/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I22/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I20/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I18/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I16/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I14/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I12/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I10/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I8/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I6/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I4/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I2/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I0/re
   g2_Data_High is configured, but output is not used.
DRC detected 0 errors and 65 warnings.
Creating bit map...
Saving bit stream in "system.bit".
Creating bit mask...
Saving mask bit stream in "system.msk".
Bitstream generation is complete.
*********************************************
Creating software libraries...
*********************************************
libgen -mhs system.mhs -p XC3S200FT256-4   system.mss
libgen
Xilinx EDK 6.3 Build EDK_Gmm.10
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
PM_SPEC -- Xilinx path component is <C:/EDK>

Command Line: libgen -mhs system.mhs -p XC3S200FT256-4 system.mss 

Output Directory (-od)		: C:\edk_user_repository\lab1\
Part (-p)			: spartan3

Software Specification file	: system.mss
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_v20_v1_10_b/data/opb_v20_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v1_00_b/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_emc_v1_10_b/data/opb_emc_v2_1_0.tcl
...Done

Overriding IP level properties ...
opb_timer (opb_timer_1) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_timer_v1_00_b\data\opb_timer_v2_1_0.mp
d:31 - overriding c_family value virtex2 to spartan3
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
32 - overriding c_family value virtex2 to spartan3
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to spartan3
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:55 - overriding c_family value virtex2 to spartan3
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:56 - overriding c_instance value microblaze to microblaze_0
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to spartan3
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd:37
- overriding c_family value virtex2 to spartan3
opb_gpio (push_buttons_3bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (leds_8bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (led_cathodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (led_anodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3

Performing IP level DRCs on properties...

Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/emc_common_v2_00_a/data/emc_common_v2_1_0.
tcl ...Done
Address Map for Processor microblaze_0
  (0x00000000-0x00001fff) dlmb_cntlr	dlmb
  (0x00000000-0x00001fff) ilmb_cntlr	ilmb
  (0x80200000-0x802000ff) opb_timer_1	mb_opb
  (0x80200100-0x802001ff) opb_intc_0	mb_opb
  (0x80200200-0x802002ff) debug_module	mb_opb
  (0x80200300-0x802003ff) RS232	mb_opb
  (0x80200400-0x802005ff) SRAM_256Kx32	mb_opb
  (0x80200600-0x802007ff) Push_Buttons_3Bit	mb_opb
  (0x80200800-0x802009ff) LEDs_8Bit	mb_opb
  (0x80200a00-0x80200bff) LED_cathodes	mb_opb
  (0x80200c00-0x80200dff) LED_anodes	mb_opb
  (0x80202000-0x80203fff) opb_bram_if_cntlr_1	mb_opb
  (0x80300000-0x803fffff) SRAM_256Kx32	mb_opb

Check platform configuration ...
opb_v20 (mb_opb) - C:\edk_user_repository\lab1\system.mhs:100 - 2 master(s) : 10
slave(s)
lmb_v10 (ilmb) - C:\edk_user_repository\lab1\system.mhs:124 - 1 master(s) : 1
slave(s)
lmb_v10 (dlmb) - C:\edk_user_repository\lab1\system.mhs:141 - 1 master(s) : 1
slave(s)

Check port drivers...

Check platform address map ...

Overriding system level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
41 - overriding c_kind_of_intr value 11111111111111111111111111111111 to
0b00000000000000000000000000000010
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
42 - overriding c_kind_of_edge value 11111111111111111111111111111111 to
0b00000000000000000000000000000010
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
43 - overriding c_kind_of_lvl value 11111111111111111111111111111111 to
0b00000000000000000000000000000001
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:34 - overriding c_memsize value 2048 to 8192
opb_v20 (mb_opb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_v20_v1_10_b\data\opb_v20_v2_1_0.mpd:39
- overriding c_num_masters value 4 to 2
opb_v20 (mb_opb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_v20_v1_10_b\data\opb_v20_v2_1_0.mpd:40
- overriding c_num_slaves value 4 to 10
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:34 - overriding c_memsize value 2048 to 8192
lmb_bram_if_cntlr (ilmb_cntlr) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_bram_if_cntlr_v1_00_b\data\lmb_bram_if
_cntlr_v2_1_0.mpd:41 - overriding c_mask value 0x00800000 to
0b00000000001000000000000000000000
lmb_v10 (ilmb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_v10_v1_00_a\data\lmb_v10_v2_1_0.mpd:35
- overriding c_lmb_num_slaves value 4 to 1
lmb_bram_if_cntlr (dlmb_cntlr) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_bram_if_cntlr_v1_00_b\data\lmb_bram_if
_cntlr_v2_1_0.mpd:41 - overriding c_mask value 0x00800000 to
0b00000000001000000000000000000000
lmb_v10 (dlmb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_v10_v1_00_a\data\lmb_v10_v2_1_0.mpd:35
- overriding c_lmb_num_slaves value 4 to 1

Running DRC Tcl procedures for OPTION SYSLEVEL_DRC_PROC...

Performing System level DRCs on properties...
INFO:MDT - List of peripherals addressable from processor instance microblaze_0
   : 
  - dlmb_cntlr
  - ilmb_cntlr
  - opb_timer_1
  - opb_intc_0
  - opb_bram_if_cntlr_1
  - debug_module
  - SRAM_256Kx32
  - RS232
  - Push_Buttons_3Bit
  - LEDs_8Bit
  - LED_cathodes
  - LED_anodes

Building Directory Structure for microblaze_0

Generating platform libraries and device drivers ...

Running CopyFiles ...

Copying files for os standalone_v1_00_a from
C:\EDK\sw\lib\bsp\standalone_v1_00_a\src\ to
C:\edk_user_repository\lab1\microblaze_0\libsrc\standalone_v1_00_a\ ...

Copying files for driver tmrctr_v1_00_b from
C:\EDK\sw\XilinxProcessorIPLib\drivers\tmrctr_v1_00_b\src\ to
C:\edk_user_repository\lab1\microblaze_0\libsrc\tmrctr_v1_00_b\ ...

Copying files for driver intc_v1_00_c from
C:\EDK\sw\XilinxProcessorIPLib\drivers\intc_v1_00_c\src\ to
C:\edk_user_repository\lab1\microblaze_0\libsrc\intc_v1_00_c\ ...

Copying files for driver uartlite_v1_00_b from
C:\EDK\sw\XilinxProcessorIPLib\drivers\uartlite_v1_00_b\src\ to
C:\edk_user_repository\lab1\microblaze_0\libsrc\uartlite_v1_00_b\ ...

Copying files for driver emc_v1_00_a from
C:\EDK\sw\XilinxProcessorIPLib\drivers\emc_v1_00_a\src\ to
C:\edk_user_repository\lab1\microblaze_0\libsrc\emc_v1_00_a\ ...

Copying files for driver gpio_v2_00_a from
C:\EDK\sw\XilinxProcessorIPLib\drivers\gpio_v2_00_a\src\ to
C:\edk_user_repository\lab1\microblaze_0\libsrc\gpio_v2_00_a\ ...

Copying files for driver cpu_v1_00_a from
C:\EDK\sw\XilinxProcessorIPLib\drivers\cpu_v1_00_a\src\ to
C:\edk_user_repository\lab1\microblaze_0\libsrc\cpu_v1_00_a\ ...

Running DRCs for OSes, Drivers and Libraries ... 

Running generate for OS'es, Drivers and Libraries ... 
WARNING: The parameter USE_DCR for the intc driver has been deprecated.  Any reference to this parameter in the MSS file will be ignored.
define_config_file: XNullHandler
Copying Library Files ...

Running post_generate for OS'es, Drivers and Libraries ... 

Running make for Drivers and Libraries ... 

Configuring make for target include using:

make -s include "COMPILER=mb-gcc" "ARCHIVER=mb-ar"
"COMPILER_FLAGS=-mno-xl-soft-mul -O2 -c" "EXTRA_COMPILER_FLAGS=-g" 

Configuring make for target libs using:

make -s libs "COMPILER=mb-gcc" "ARCHIVER=mb-ar"
"COMPILER_FLAGS=-mno-xl-soft-mul -O2 -c" "EXTRA_COMPILER_FLAGS=-g" 
Compiling common
Compiling ipif
Compiling  microblaze_disable_dcache.s
Compiling  microblaze_disable_exceptions.s
Compiling  microblaze_disable_icache.s
Compiling  microblaze_disable_interrupts.s
Compiling  microblaze_enable_dcache.s
Compiling  microblaze_enable_exceptions.s
Compiling  microblaze_enable_icache.s
Compiling  microblaze_enable_interrupts.s
Compiling  microblaze_init_dcache_range.s
Compiling  microblaze_init_icache_range.s
Compiling  microblaze_update_dcache.s
Compiling  microblaze_update_icache.s
Compiling  inbyte.c
Compiling  microblaze_exception_handler.c
Compiling  microblaze_exceptions_g.c
Compiling  microblaze_interrupt_handler.c
Compiling  microblaze_interrupts_g.c
Compiling  outbyte.c
Compiling  hw_exception_handler.S
Compiling tmrctr
Compiling intc
Compiling uartlite
Compiling emc
Compiling gpio
Compiling cpu

Libraries generated in C:\edk_user_repository\lab1\microblaze_0\lib\ directory

Running execs_generate for OS'es, Drivers and Libraries ... 

LibGen Done. 
mb-gcc -O2 TestInterrupt/src/TestInterrupt.c  -o TestInterrupt/executable.elf \
   -mno-xl-soft-mul      -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
mb-size TestInterrupt/executable.elf 
   text	   data	    bss	    dec	    hex	filename
   5792	     64	   1032	   6888	   1ae8	TestInterrupt/executable.elf
*********************************************
Initializing BRAM contents of the bitstream
*********************************************
bitinit system.mhs  -pe microblaze_0 TestInterrupt/executable.elf  \
-bt implementation/system.bit -o implementation/download.bit

bitinit version Xilinx EDK 6.3 Build EDK_Gmm.10
Copyright (c) Xilinx Inc. 2002.

Parsing MHS File system.mhs...
PM_SPEC -- Xilinx path component is <C:/EDK>
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_v20_v1_10_b/data/opb_v20_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v1_00_b/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_emc_v1_10_b/data/opb_emc_v2_1_0.tcl
...Done

Overriding IP level properties ...
opb_timer (opb_timer_1) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_timer_v1_00_b\data\opb_timer_v2_1_0.mp
d:31 - overriding c_family value virtex2 to 
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
32 - overriding c_family value virtex2 to 
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to 
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:55 - overriding c_family value virtex2 to 
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:56 - overriding c_instance value microblaze to microblaze_0
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to 
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd:37
- overriding c_family value virtex2 to 
opb_gpio (push_buttons_3bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (leds_8bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (led_cathodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (led_anodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 

Performing IP level DRCs on properties...

Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/emc_common_v2_00_a/data/emc_common_v2_1_0.
tcl ...Done
Address Map for Processor microblaze_0
  (0x00000000-0x00001fff) dlmb_cntlr	dlmb
  (0x00000000-0x00001fff) ilmb_cntlr	ilmb
  (0x80200000-0x802000ff) opb_timer_1	mb_opb
  (0x80200100-0x802001ff) opb_intc_0	mb_opb
  (0x80200200-0x802002ff) debug_module	mb_opb
  (0x80200300-0x802003ff) RS232	mb_opb
  (0x80200400-0x802005ff) SRAM_256Kx32	mb_opb
  (0x80200600-0x802007ff) Push_Buttons_3Bit	mb_opb
  (0x80200800-0x802009ff) LEDs_8Bit	mb_opb
  (0x80200a00-0x80200bff) LED_cathodes	mb_opb
  (0x80200c00-0x80200dff) LED_anodes	mb_opb
  (0x80202000-0x80203fff) opb_bram_if_cntlr_1	mb_opb
  (0x80300000-0x803fffff) SRAM_256Kx32	mb_opb

Initializing Memory...
Checking ELFs associated with MICROBLAZE instance microblaze_0 for overlap...


Analyzing file TestInterrupt/executable.elf...
Running Data2Mem with the following command:
data2mem -bm implementation/system_bd -bt implementation/system.bit  -bd
TestInterrupt/executable.elf tag lmb_bram opb_bram_if_cntlr_1_bram  -o b
implementation/download.bit 
Memory Initialization completed successfully.

*********************************************
Downloading Bitstream onto the target board
*********************************************
impact -batch etc/download.cmd
PM_SPEC -- Xilinx path component is <C:/EDK>
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setCable -port auto
AutoDetecting cable. Please wait.
Connecting to cable (USB Port).
Cable connection failed.
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2. LPT base address = 0278h.
 ECP base address = FFFFFFFFh.
Cable connection established.
// *** BATCH CMD : identify
Identifying chain contents ....Version is 0000
'1': : Manufacturer's ID =Xilinx xcf02s, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/xcf/data/xcf02s.bsd...
INFO:iMPACT:501 - '1': Added Device xcf02s successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
Version is 0000
'2': : Manufacturer's ID =Xilinx xc3s400, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s400.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
Elapsed time =      2 sec.
// *** BATCH CMD : identifyMPM
Elapsed time =      0 sec.
// *** BATCH CMD : setAttribute -position 1 -attr configFileName -value
"implementation/download.bit"
'1': Loading file 'implementation/download.bit' ...
done.
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s200.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s200 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
// *** BATCH CMD : program -p 1 
Validating chain...
Boundary-scan chain validated successfully.
ERROR:iMPACT:583 - '1': The idcode read from the device does not match the
   idcode in the bsdl File.
INFO:iMPACT:1578 - '1':  Device IDCODE :        00000001010000011100000010010011
INFO:iMPACT:1579 - '1': Expected IDCODE:    00000001010000010100000010010011
Elapsed time =      0 sec.
----------------------------------------------------------------------
----------------------------------------------------------------------
make: *** [download] Error 1
Done.
At GMT date and time: 2005:7:28:4:53:21
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make download; exit;" Started...

*********************************************
Downloading Bitstream onto the target board
*********************************************
impact -batch etc/download.cmd
PM_SPEC -- Xilinx path component is <C:/EDK>
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setCable -port auto
AutoDetecting cable. Please wait.
Connecting to cable (USB Port).
Cable connection failed.
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2. LPT base address = 0278h.
 ECP base address = FFFFFFFFh.
Cable connection established.
// *** BATCH CMD : identify
Identifying chain contents ....Version is 0000
'1': : Manufacturer's ID =Xilinx xcf02s, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/xcf/data/xcf02s.bsd...
INFO:iMPACT:501 - '1': Added Device xcf02s successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
Version is 0000
'2': : Manufacturer's ID =Xilinx xc3s400, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s400.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
Elapsed time =      1 sec.
// *** BATCH CMD : identifyMPM
Elapsed time =      0 sec.
// *** BATCH CMD : setAttribute -position 1 -attr configFileName -value
"implementation/download.bit"
'1': Loading file 'implementation/download.bit' ...
done.
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s200.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s200 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
// *** BATCH CMD : program -p 1 
Validating chain...
Boundary-scan chain validated successfully.
ERROR:iMPACT:583 - '1': The idcode read from the device does not match the
   idcode in the bsdl File.
INFO:iMPACT:1578 - '1':  Device IDCODE :        00000001010000011100000010010011
INFO:iMPACT:1579 - '1': Expected IDCODE:    00000001010000010100000010010011
Elapsed time =      0 sec.
----------------------------------------------------------------------
----------------------------------------------------------------------
make: *** [download] Error 1
Done.
At GMT date and time: 2005:7:28:4:53:59
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make download; exit;" Started...

*********************************************
Downloading Bitstream onto the target board
*********************************************
impact -batch etc/download.cmd
PM_SPEC -- Xilinx path component is <C:/EDK>
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setCable -port auto
AutoDetecting cable. Please wait.
Connecting to cable (USB Port).
Cable connection failed.
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2. LPT base address = 0278h.
 ECP base address = FFFFFFFFh.
Cable connection established.
// *** BATCH CMD : identify
Identifying chain contents ....Version is 0000
'1': : Manufacturer's ID =Xilinx xcf02s, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/xcf/data/xcf02s.bsd...
INFO:iMPACT:501 - '1': Added Device xcf02s successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
Version is 0000
'2': : Manufacturer's ID =Xilinx xc3s400, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s400.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
Elapsed time =      2 sec.
// *** BATCH CMD : identifyMPM
Elapsed time =      0 sec.
// *** BATCH CMD : setAttribute -position 1 -attr configFileName -value
"implementation/download.bit"
'1': Loading file 'implementation/download.bit' ...
done.
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s200.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s200 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
// *** BATCH CMD : program -p 1 
Validating chain...
Boundary-scan chain validated successfully.
ERROR:iMPACT:583 - '1': The idcode read from the device does not match the
   idcode in the bsdl File.
INFO:iMPACT:1578 - '1':  Device IDCODE :        00000001010000011100000010010011
INFO:iMPACT:1579 - '1': Expected IDCODE:    00000001010000010100000010010011
Elapsed time =      0 sec.
----------------------------------------------------------------------
----------------------------------------------------------------------
make: *** [download] Error 1
Done.
At GMT date and time: 2005:7:28:4:54:22
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make download; exit;" Started...

*********************************************
Downloading Bitstream onto the target board
*********************************************
impact -batch etc/download.cmd
PM_SPEC -- Xilinx path component is <C:/EDK>
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setCable -port auto
AutoDetecting cable. Please wait.
Connecting to cable (USB Port).
Cable connection failed.
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2. LPT base address = 0278h.
 ECP base address = FFFFFFFFh.
Cable connection established.
// *** BATCH CMD : identify
Identifying chain contents ....Version is 0000
'1': : Manufacturer's ID =Xilinx xcf02s, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/xcf/data/xcf02s.bsd...
INFO:iMPACT:501 - '1': Added Device xcf02s successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
Version is 0000
'2': : Manufacturer's ID =Xilinx xc3s400, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s400.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
Elapsed time =      1 sec.
// *** BATCH CMD : identifyMPM
Elapsed time =      0 sec.
// *** BATCH CMD : setAttribute -position 1 -attr configFileName -value
"implementation/download.bit"
'1': Loading file 'implementation/download.bit' ...
done.
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s200.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s200 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
// *** BATCH CMD : program -p 1 
Validating chain...
Boundary-scan chain validated successfully.
ERROR:iMPACT:583 - '1': The idcode read from the device does not match the
   idcode in the bsdl File.
INFO:iMPACT:1578 - '1':  Device IDCODE :        00000001010000011100000010010011
INFO:iMPACT:1579 - '1': Expected IDCODE:    00000001010000010100000010010011
Elapsed time =      0 sec.
----------------------------------------------------------------------
----------------------------------------------------------------------
make: *** [download] Error 1
Done.
At GMT date and time: 2005:7:28:4:56:33
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make download; exit;" Started...
Copying Xilinx Implementation tool scripts..
*********************************************
Running Xilinx Implementation tools..
*********************************************
xflow -wd implementation -p xc3s400ft256-4 -implement fast_runtime.opt system.ngc
Release 6.3i - Xflow G.35
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
xflow.exe -wd implementation -p xc3s400ft256-4 -implement fast_runtime.opt
system.ngc  
PM_SPEC -- Xilinx path component is <C:/EDK>

Using Flow File: C:/edk_user_repository/lab1/implementation/fpga.flw 
Using Option File(s): 
 C:/edk_user_repository/lab1/implementation/fast_runtime.opt 

Creating Script File ... 

#----------------------------------------------#
# Starting program ngdbuild
# ngdbuild -p xc3s400ft256-4 -nt timestamp -bm system.bmm
C:/edk_user_repository/lab1/implementation/system.ngc -uc system.ucf system.ngd 
#----------------------------------------------#
Release 6.3i - ngdbuild G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
PM_SPEC -- Xilinx path component is <C:/EDK>

Command Line: ngdbuild -p xc3s400ft256-4 -nt timestamp -bm system.bmm -uc
system.ucf C:/edk_user_repository/lab1/implementation/system.ngc system.ngd 

Reading NGO file "C:/edk_user_repository/lab1/implementation/system.ngc" ...
Reading component libraries for design expansion...
Loading design module
"C:/edk_user_repository/lab1/implementation/opb_timer_1_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/opb_intc_0_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/opb_bram_if_cntlr_1_bram_wrapper.ngc
"...
Loading design module
"C:/edk_user_repository/lab1/implementation/opb_bram_if_cntlr_1_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/microblaze_0_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/mb_opb_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/lmb_bram_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/ilmb_cntlr_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/ilmb_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/dlmb_cntlr_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/dlmb_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/debug_module_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/sram_256kx32_util_bus_split_0_wrappe
r.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/sram_256kx32_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/rs232_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/push_buttons_3bit_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/leds_8bit_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/led_cathodes_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/led_anodes_wrapper.ngc"...

Annotating constraints to design from file "system.ucf" ...

Checking timing specifications ...

Processing BMM file ...

Checking expanded design ...
WARNING:NgdBuild:443 - SFF primitive 'opb_timer_1/opb_timer_1/SEQADDR_FF_I' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'opb_timer_1/opb_timer_1/ABUS_FF_I24' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'opb_timer_1/opb_timer_1/ABUS_FF_I25' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'opb_timer_1/opb_timer_1/ABUS_FF_I30' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'opb_timer_1/opb_timer_1/ABUS_FF_I31' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I11' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I10' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I8' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I7' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I6' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I5' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I4' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I3' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I2' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I1' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I0' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I20' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I19' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I16' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I15' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I17' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I18' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I12' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I9' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I12' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I14' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I13' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I9' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I10' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I11' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I8' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I3' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I4' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I5' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I6' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I7' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I2' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I0' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR0_FF_I1' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I13' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I18' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I19' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I16' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I17' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I14' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I15' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_timer_1/opb_timer_1/TC_CORE_I/TIMER_CONTROL_I/TCSR1_FF_I20' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_ABUS_REG_BIT_I24' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_ABUS_REG_BIT_I25' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_ABUS_REG_BIT_I26' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_ABUS_REG_BIT_I30' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_ABUS_REG_BIT_I31' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I0' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I1' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I2' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I3' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I4' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I5' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I6' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I7' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I8' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I9' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I10' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I11' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I12' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I13' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I14' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I15' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I16' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I17' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I18' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I19' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I20' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I21' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I22' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I23' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I24' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I25' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I26' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I27' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I28' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I29' has unconnected
   output pin
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<11>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<10>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<9>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<8>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<7>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<6>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<5>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<4>' has no
   load
WARNING:NgdBuild:454 - logical net 'net_vcc2<1>' has no load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<3>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<2>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<1>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<0>' has no
   load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<0>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<1>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<2>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<3>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<4>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<5>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<6>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<7>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<8>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<9>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<10>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<11>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<12>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<13>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<14>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<15>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<16>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<17>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<18>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<19>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<20>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<21>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<22>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<23>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<24>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<25>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<26>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<27>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<28>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<29>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<30>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<31>' has
   no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<0>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_AS' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Write' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Read' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<31>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<30>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<29>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<28>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<27>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<26>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<25>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<24>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<23>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<22>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<21>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<20>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<19>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_WRITE' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<18>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_ADDR<0>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<17>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<16>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<15>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<14>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<13>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<12>' has no
   load
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Iopb_Interface_I/Iopb_Interrupt' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<11>' has no
   load
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Dopb_Interface_I/Dopb_Interrupt' has no load
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/PC_Module_I/PC_Bit_I0/Carry_Out' has
   no load
WARNING:NgdBuild:452 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/word_r1_r2_unalignment' has no driver
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/word_r1_r2_unalignment' has no load
WARNING:NgdBuild:452 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/word_r1_imm_unalignment' has no driver
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/word_r1_imm_unalignment' has no load
WARNING:NgdBuild:452 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/halfword_unalignment' has no driver
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/halfword_unalignment' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<6>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<5>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<10>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<9>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<8>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<7>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<4>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<3>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<2>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<1>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<0>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_ADDR<4>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_ADDR<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_ADDR<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_ADDR<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<9>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<8>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<7>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<6>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<5>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<4>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PREFETCH_ADDR<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PREFETCH_ADDR<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PREFETCH_ADDR<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<31>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<30>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<29>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<28>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<27>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<26>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<25>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<24>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<23>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<22>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<21>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<20>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<19>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<18>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<17>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<16>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<15>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<14>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<13>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<12>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<11>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<10>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<9>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<8>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<7>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<6>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<5>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<4>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/INTERRUPT_TAKEN' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<6>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<0>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Branch_Instr' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<17>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<8>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<9>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<10>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<22>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<31>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<11>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<12>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<13>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<14>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<7>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<16>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<15>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<19>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<18>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<21>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<20>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<28>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<27>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<24>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<23>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<29>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MB_Halted' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_hwXfer' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_fwXfer' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_dwXfer' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_toutSup' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<0>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_beXfer' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<31>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<30>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<29>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<28>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<27>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<26>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<25>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<24>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<23>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<22>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<21>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<20>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<19>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<18>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<17>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<16>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<15>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<14>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<13>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<12>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<11>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<10>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<9>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<8>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<7>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<6>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<5>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<4>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<3>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<2>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<1>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_dwAck' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_beAck' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_hwAck' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_fwAck' has no load
WARNING:NgdBuild:454 - logical net 'debug_module/bscan_drck1' has no load
WARNING:NgdBuild:478 - clock net 'debug_module/bscan_drck1' drives no clock pins
WARNING:NgdBuild:454 - logical net 'debug_module/bscan_reset' has no load
WARNING:NgdBuild:454 - logical net 'debug_module/bscan_sel1' has no load
WARNING:NgdBuild:454 - logical net 'debug_module/Interrupt' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_QWEN<2>' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_QWEN<1>' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_QWEN<3>' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_RNW' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_CE<0>' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_RPN' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_QWEN<0>' has no load
WARNING:NgdBuild:454 - logical net 'push_buttons_3bit/GPIO_IO_T<2>' has no load

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings: 304

Total memory usage is 57448 kilobytes

Writing NGD file "system.ngd" ...

Writing NGDBUILD log file "system.bld"...

NGDBUILD done.



#----------------------------------------------#
# Starting program map
# map -o system_map.ncd -pr b system.ngd system.pcf 
#----------------------------------------------#
Release 6.3i - Map G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
PM_SPEC -- Xilinx path component is <C:/EDK>
Using target part "3s400ft256-4".
Removing unused or disabled logic...
Running cover...
Writing file system_map.ngm...
Running directed packing...
Running delay-based LUT packing...
Running related packing...
Writing design file "system_map.ncd"...

Design Summary:
Number of errors:      0
Number of warnings:   71
Logic Utilization:
  Number of Slice Flip Flops:       1,731 out of   7,168   24%
  Number of 4 input LUTs:           2,089 out of   7,168   29%
Logic Distribution:
  Number of occupied Slices:                        1,784 out of   3,584   49%
    Number of Slices containing only related logic:   1,784 out of   1,784  100%
    Number of Slices containing unrelated logic:          0 out of   1,784    0%
      *See NOTES below for an explanation of the effects of unrelated logic
Total Number 4 input LUTs:          2,550 out of   7,168   35%
  Number used as logic:              2,089
  Number used as a route-thru:          44
  Number used for Dual Port RAMs:      256
    (Two LUTs used per Dual Port RAM)
  Number used as Shift registers:      161
  Number of bonded IOBs:               85 out of     173   49%
    IOB Flip Flops:                    81
  Number of Block RAMs:                8 out of      16   50%
  Number of MULT18X18s:                3 out of      16   18%
  Number of GCLKs:                     2 out of       8   25%
  Number of BSCANs:                    1 out of       1  100%

   Number of RPM macros:            5
Total equivalent gate count for design:  592,442
Additional JTAG gate count for IOBs:  4,080
Peak Memory Usage:  99 MB

NOTES:

   Related logic is defined as being logic that shares connectivity -
   e.g. two LUTs are "related" if they share common inputs.
   When assembling slices, Map gives priority to combine logic that
   is related.  Doing so results in the best timing performance.

   Unrelated logic shares no connectivity.  Map will only begin
   packing unrelated logic into a slice once 99% of the slices are
   occupied through related logic packing.

   Note that once logic distribution reaches the 99% level through
   related logic packing, this does not mean the device is completely
   utilized.  Unrelated logic packing will then begin, continuing until
   all usable LUTs and FFs are occupied.  Depending on your timing
   budget, increased levels of unrelated logic packing may adversely
   affect the overall timing performance of your design.


Mapping completed.
See MAP report file "system_map.mrp" for details.



#----------------------------------------------#
# Starting program par
# par -w -ol std system_map.ncd system.ncd system.pcf 
#----------------------------------------------#
Release 6.3i - Par G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.


PM_SPEC -- Xilinx path component is <C:/EDK>


Constraints file: system.pcf

Loading device database for application Par from file "system_map.ncd".
   "system" is an NCD, version 2.38, device xc3s400, package ft256, speed -4
Loading device for application Par from file '3s400.nph' in environment
C:/Xilinx.
Device speed data version:  PRODUCTION 1.35 2004-11-11.


Resolving physical constraints.
Finished resolving physical constraints.

Device utilization summary:

   Number of External IOBs            85 out of 173    49%
      Number of LOCed External IOBs   85 out of 85    100%

   Number of MULT18X18s                3 out of 16     18%
   Number of RAMB16s                   8 out of 16     50%
   Number of Slices                 1784 out of 3584   49%
      Number of SLICEMs              321 out of 1792   17%

   Number of BSCANs                    1 out of 1     100%
   Number of BUFGMUXs                  2 out of 8      25%



Overall effort level (-ol):   Standard (set by user)
Placer effort level (-pl):    Standard (set by user)
Placer cost table entry (-t): 1
Router effort level (-rl):    Standard (set by user)

Starting initial Timing Analysis.  REAL time: 2 secs 
Finished initial Timing Analysis.  REAL time: 5 secs 


Phase 1.1
Phase 1.1 (Checksum:98eef3) REAL time: 6 secs 
.
Phase 3.8
........................................................................
...
....
Phase 3.8 (Checksum:bd1a34) REAL time: 14 secs 

Phase 4.5
Phase 4.5 (Checksum:26259fc) REAL time: 15 secs 

Phase 5.18
Phase 5.18 (Checksum:2faf07b) REAL time: 23 secs 

Writing design to file system.ncd.

Total REAL time to Placer completion: 25 secs 
Total CPU time to Placer completion: 24 secs 


Phase 1: 13699 unrouted;       REAL time: 25 secs 
Phase 2: 11691 unrouted;       REAL time: 28 secs 
Phase 3: 5426 unrouted;       REAL time: 31 secs 
Phase 4: 5426 unrouted; (634)      REAL time: 32 secs 

Phase 5: 5428 unrouted; (0)      REAL time: 34 secs 
Phase 6: 5428 unrouted; (0)      REAL time: 35 secs 
Phase 7: 0 unrouted; (0)      REAL time: 1 mins 7 secs 
Total REAL time to Router completion: 1 mins 8 secs 
Total CPU time to Router completion: 1 mins 7 secs 

Generating "par" statistics.

**************************
Generating Clock Report
**************************

+-------------------------+----------+------+------+------------+-------------+
|        Clock Net        | Resource |Locked|Fanout|Net Skew(ns)|Max Delay(ns)|
+-------------------------+----------+------+------+------------+-------------+
|         DBG_CLK_s       |  BUFGMUX7| No   |  140 |  0.020     |  1.034      |
+-------------------------+----------+------+------+------------+-------------+
|dlmb_port_BRAM_Clk       |  BUFGMUX0| No   | 1233 |  0.060     |  1.074      |
+-------------------------+----------+------+------+------------+-------------+
|debug_module/bscan_updat |          |      |      |            |             |
|                       e |   Local  |      |    1 |  0.000     |  1.002      |
+-------------------------+----------+------+------+------------+-------------+
|opb_intc_0/opb_intc_0/IN |          |      |      |            |             |
|TC_CORE_I/INTR_DET_I/int |          |      |      |            |             |
|              errupts<1> |   Local  |      |    1 |  0.000     |  1.031      |
+-------------------------+----------+------+------+------------+-------------+
Timing Score: 0

Asterisk (*) preceding a constraint indicates it was not met.
   This may be due to a setup or hold violation.

--------------------------------------------------------------------------------
  Constraint                                | Requested  | Actual     | Logic 
                                            |            |            | Levels
--------------------------------------------------------------------------------
  NET "bufgp_71/IBUFG" PERIOD =  20 nS   HI | 20.000ns   | 19.908ns   | 8    
  GH 50.000000 %                            |            |            |      
--------------------------------------------------------------------------------


All constraints were met.
Generating Pad Report.

All signals are completely routed.

Total REAL time to PAR completion: 1 mins 14 secs 
Total CPU time to PAR completion: 1 mins 12 secs 

Peak Memory Usage:  116 MB

Placement: Completed - No errors found.
Routing: Completed - No errors found.
Timing: Completed - No errors found.

Writing design to file system.ncd.


PAR done.



#----------------------------------------------#
# Starting program post_par_trce
# trce -e 3 -xml system.twx system.ncd system.pcf 
#----------------------------------------------#
Release 6.3i - Trace G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.



Loading device database for application trce from file "system.ncd".
PM_SPEC -- Xilinx path component is <C:/EDK>
   "system" is an NCD, version 2.38, device xc3s400, package ft256, speed -4
Loading device for application trce from file '3s400.nph' in environment
C:/Xilinx.
--------------------------------------------------------------------------------
Release 6.3i Trace G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.

trce -e 3 -xml system.twx system.ncd system.pcf


Design file:              system.ncd
Physical constraint file: system.pcf
Device,speed:             xc3s400,-4 (PRODUCTION 1.35 2004-11-11)
Report level:             error report
--------------------------------------------------------------------------------

INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
   option. All paths that are not constrained will be reported in the
   unconstrained paths section(s) of the report.


Timing summary:
---------------

Timing errors: 0  Score: 0

Constraints cover 187811 paths, 0 nets, and 12065 connections

Design statistics:
   Minimum period:  19.908ns (Maximum frequency:  50.231MHz)


Analysis completed Thu Jul 28 12:58:54 2005
--------------------------------------------------------------------------------

Generating Report ...

Total time: 7 secs 
xflow done!
cd implementation; bitgen -w -f bitgen.ut system
Release 6.3i - Bitgen G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.

Loading device database for application Bitgen from file "system.ncd".
PM_SPEC -- Xilinx path component is <C:/EDK>
   "system" is an NCD, version 2.38, device xc3s400, package ft256, speed -4
Loading device for application Bitgen from file '3s400.nph' in environment
C:/Xilinx.
Opened constraints file system.pcf.

Thu Jul 28 12:58:57 2005
Running DRC.
WARNING:DesignRules:372 - Netcheck: Gated clock. Clock net
   opb_intc_0/opb_intc_0/INTC_CORE_I/INTR_DET_I/interrupts<1> is sourced by a
   combinatorial pin. This is not good design practice. Use the CE pin to
   control the loading of data into the flip-flop.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I31/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I29/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I27/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I25/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I23/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I21/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I19/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I17/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I15/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I13/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I11/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I9/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I7/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I5/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I3/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I1/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I31/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I29/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I27/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I25/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I23/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I21/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I19/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I17/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I15/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I13/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I11/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I9/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I7/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I5/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I3/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I1/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I30/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I28/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I26/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I24/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I22/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I20/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I18/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I16/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I14/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I12/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I10/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I8/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I6/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I4/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I2/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I0/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I30/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I28/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I26/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I24/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I22/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I20/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I18/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I16/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I14/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I12/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I10/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I8/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I6/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I4/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I2/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I0/re
   g2_Data_High is configured, but output is not used.
DRC detected 0 errors and 65 warnings.
Creating bit map...
Saving bit stream in "system.bit".
Creating bit mask...
Saving mask bit stream in "system.msk".
Bitstream generation is complete.
*********************************************
Initializing BRAM contents of the bitstream
*********************************************
bitinit system.mhs  -pe microblaze_0 TestInterrupt/executable.elf  \
-bt implementation/system.bit -o implementation/download.bit

bitinit version Xilinx EDK 6.3 Build EDK_Gmm.10
Copyright (c) Xilinx Inc. 2002.

Parsing MHS File system.mhs...
PM_SPEC -- Xilinx path component is <C:/EDK>
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_v20_v1_10_b/data/opb_v20_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v1_00_b/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_emc_v1_10_b/data/opb_emc_v2_1_0.tcl
...Done

Overriding IP level properties ...
opb_timer (opb_timer_1) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_timer_v1_00_b\data\opb_timer_v2_1_0.mp
d:31 - overriding c_family value virtex2 to 
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
32 - overriding c_family value virtex2 to 
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to 
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:55 - overriding c_family value virtex2 to 
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:56 - overriding c_instance value microblaze to microblaze_0
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to 
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd:37
- overriding c_family value virtex2 to 
opb_gpio (push_buttons_3bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (leds_8bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (led_cathodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (led_anodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 

Performing IP level DRCs on properties...

Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/emc_common_v2_00_a/data/emc_common_v2_1_0.
tcl ...Done
Address Map for Processor microblaze_0
  (0x00000000-0x00001fff) dlmb_cntlr	dlmb
  (0x00000000-0x00001fff) ilmb_cntlr	ilmb
  (0x80200000-0x802000ff) opb_timer_1	mb_opb
  (0x80200100-0x802001ff) opb_intc_0	mb_opb
  (0x80200200-0x802002ff) debug_module	mb_opb
  (0x80200300-0x802003ff) RS232	mb_opb
  (0x80200400-0x802005ff) SRAM_256Kx32	mb_opb
  (0x80200600-0x802007ff) Push_Buttons_3Bit	mb_opb
  (0x80200800-0x802009ff) LEDs_8Bit	mb_opb
  (0x80200a00-0x80200bff) LED_cathodes	mb_opb
  (0x80200c00-0x80200dff) LED_anodes	mb_opb
  (0x80202000-0x80203fff) opb_bram_if_cntlr_1	mb_opb
  (0x80300000-0x803fffff) SRAM_256Kx32	mb_opb

Initializing Memory...
Checking ELFs associated with MICROBLAZE instance microblaze_0 for overlap...


Analyzing file TestInterrupt/executable.elf...
Running Data2Mem with the following command:
data2mem -bm implementation/system_bd -bt implementation/system.bit  -bd
TestInterrupt/executable.elf tag lmb_bram opb_bram_if_cntlr_1_bram  -o b
implementation/download.bit 
Memory Initialization completed successfully.
*********************************************
Downloading Bitstream onto the target board
*********************************************
impact -batch etc/download.cmd
PM_SPEC -- Xilinx path component is <C:/EDK>
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setCable -port auto
AutoDetecting cable. Please wait.
Connecting to cable (USB Port).
Cable connection failed.
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2. LPT base address = 0278h.
 ECP base address = FFFFFFFFh.
LPT port is already in use. rc = 2000000Eh
Cable connection failed.
Connecting to cable (Parallel Port - LPT2).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2.Cable connection failed.
Connecting to cable (Parallel Port - LPT3).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2.Cable connection failed.
Connecting to cable (Parallel Port - LPT4).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2.Cable connection failed.
Connecting to cable (Usb Port - USB21).
Checking cable driver.
Driver file not found. Inf file version = 0.
 Driver xusbdfwu.sys version: 1012 (0).
Updating firmware file: version: src=1012, dest=0.
Update completed.
 Driver windrvr6.sys version = 6.2.2.2.
Cable connection failed.
Connecting to cable (COM1 Port).
Cable connection failed.
Connecting to cable (COM2 Port).
Cable connection failed.
Cable connection failed.
Cable connection failed.
Cable autodetection failed.
make: *** [download] Error 1
Done.
At GMT date and time: 2005:7:28:5:1:12
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make download; exit;" Started...

*********************************************
Downloading Bitstream onto the target board
*********************************************
impact -batch etc/download.cmd
PM_SPEC -- Xilinx path component is <C:/EDK>
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setCable -port auto
AutoDetecting cable. Please wait.
Connecting to cable (USB Port).
Cable connection failed.
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2. LPT base address = 0278h.
 ECP base address = FFFFFFFFh.
Cable connection established.
// *** BATCH CMD : identify
Identifying chain contents ....Version is 0000
'1': : Manufacturer's ID =Xilinx xcf02s, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/xcf/data/xcf02s.bsd...
INFO:iMPACT:501 - '1': Added Device xcf02s successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
Version is 0000
'2': : Manufacturer's ID =Xilinx xc3s400, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s400.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
Elapsed time =      1 sec.
// *** BATCH CMD : identifyMPM
Elapsed time =      0 sec.
// *** BATCH CMD : setAttribute -position 1 -attr configFileName -value
"implementation/download.bit"
'1': Loading file 'implementation/download.bit' ...
done.
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
// *** BATCH CMD : program -p 1 
Validating chain...
Boundary-scan chain validated successfully.
'1':Programming  device...
'1': Reading status register contents...
INFO:iMPACT:2146 - Status register values:
INFO:iMPACT - 0011 0111 0001 1000 0000 0000 0000 0000 
done.
INFO:iMPACT:579 - '1': Completed downloading bit file to device.
INFO:iMPACT:580 - '1':Checking done pin ....done.
'1': Programmed successfully.
Elapsed time =      7 sec.
----------------------------------------------------------------------
----------------------------------------------------------------------
Done.
At GMT date and time: 2005:7:28:5:12:13
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make download; exit;" Started...

*********************************************
Downloading Bitstream onto the target board
*********************************************
impact -batch etc/download.cmd
PM_SPEC -- Xilinx path component is <C:/EDK>
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setCable -port auto
AutoDetecting cable. Please wait.
Connecting to cable (USB Port).
Cable connection failed.
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2. LPT base address = 0278h.
 ECP base address = FFFFFFFFh.
Cable connection established.
// *** BATCH CMD : identify
Identifying chain contents ....Version is 0000
'1': : Manufacturer's ID =Xilinx xcf02s, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/xcf/data/xcf02s.bsd...
INFO:iMPACT:501 - '1': Added Device xcf02s successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
Version is 0000
'2': : Manufacturer's ID =Xilinx xc3s400, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s400.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
Elapsed time =      1 sec.
// *** BATCH CMD : identifyMPM
Elapsed time =      0 sec.
// *** BATCH CMD : setAttribute -position 1 -attr configFileName -value
"implementation/download.bit"
'1': Loading file 'implementation/download.bit' ...
done.
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
// *** BATCH CMD : program -p 1 
Validating chain...
Boundary-scan chain validated successfully.
'1':Programming  device...
'1': Reading status register contents...
INFO:iMPACT:2146 - Status register values:
INFO:iMPACT - 0011 0111 0001 1000 0000 0000 0000 0000 
done.
INFO:iMPACT:579 - '1': Completed downloading bit file to device.
INFO:iMPACT:580 - '1':Checking done pin ....done.
'1': Programmed successfully.
Elapsed time =      8 sec.
----------------------------------------------------------------------
----------------------------------------------------------------------
Done.
At GMT date and time: 2005:7:28:5:12:47
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make init_bram; exit;" Started...
make: Nothing to be done for `init_bram'.
Done.
At GMT date and time: 2005:7:28:5:13:23
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make download; exit;" Started...

*********************************************
Downloading Bitstream onto the target board
*********************************************
impact -batch etc/download.cmd
PM_SPEC -- Xilinx path component is <C:/EDK>
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setCable -port auto
AutoDetecting cable. Please wait.
Connecting to cable (USB Port).
Cable connection failed.
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2. LPT base address = 0278h.
 ECP base address = FFFFFFFFh.
Cable connection established.
// *** BATCH CMD : identify
Identifying chain contents ....Version is 0000
'1': : Manufacturer's ID =Xilinx xcf02s, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/xcf/data/xcf02s.bsd...
INFO:iMPACT:501 - '1': Added Device xcf02s successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
Version is 0000
'2': : Manufacturer's ID =Xilinx xc3s400, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s400.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
Elapsed time =      1 sec.
// *** BATCH CMD : identifyMPM
Elapsed time =      0 sec.
// *** BATCH CMD : setAttribute -position 1 -attr configFileName -value
"implementation/download.bit"
'1': Loading file 'implementation/download.bit' ...
done.
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
// *** BATCH CMD : program -p 1 
Validating chain...
Boundary-scan chain validated successfully.
'1':Programming  device...
'1': Reading status register contents...
INFO:iMPACT:2146 - Status register values:
INFO:iMPACT - 0011 0111 0001 1000 0000 0000 0000 0000 
done.
INFO:iMPACT:579 - '1': Completed downloading bit file to device.
INFO:iMPACT:580 - '1':Checking done pin ....done.
'1': Programmed successfully.
Elapsed time =      8 sec.
----------------------------------------------------------------------
----------------------------------------------------------------------
Done.
At GMT date and time: 2005:7:28:5:13:47
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
TestApp/src/TestApp.c: In function `main':
TestApp/src/TestApp.c:86: `XPAR_LEDS_CATHODE_BASEADDR' undeclared (first use in this function)
TestApp/src/TestApp.c:86: (Each undeclared identifier is reported only once
TestApp/src/TestApp.c:86: for each function it appears in.)
TestApp/src/TestApp.c:87: `XPAR_LEDS_ANODE_BASEADDR' undeclared (first use in this function)
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:15:17
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
TestApp/src/TestApp.c: In function `main':
TestApp/src/TestApp.c:86: `XPAR_LEDS_CATHODES_BASEADDR' undeclared (first use in this function)
TestApp/src/TestApp.c:86: (Each undeclared identifier is reported only once
TestApp/src/TestApp.c:86: for each function it appears in.)
TestApp/src/TestApp.c:87: `XPAR_LEDS_ANODES_BASEADDR' undeclared (first use in this function)
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:15:28
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make libs; exit;" Started...
make: Nothing to be done for `libs'.
Done.
At GMT date and time: 2005:7:28:5:15:32
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
TestApp/src/TestApp.c: In function `main':
TestApp/src/TestApp.c:86: `XPAR_LEDS_CATHODES_BASEADDR' undeclared (first use in this function)
TestApp/src/TestApp.c:86: (Each undeclared identifier is reported only once
TestApp/src/TestApp.c:86: for each function it appears in.)
TestApp/src/TestApp.c:87: `XPAR_LEDS_ANODES_BASEADDR' undeclared (first use in this function)
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:19:37
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
./microblaze_0/lib//libxil.a(xintc_g.o)(.data+0x10):/xygdrive/c/edk_user_repository/lab1/microblaze_0/libsrc/intc_v1_00_c/src/xintc_g.c: undefined reference to `timer_int_handler'
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:20:23
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
./microblaze_0/lib//libxil.a(xintc_g.o)(.data+0x10):/xygdrive/c/edk_user_repository/lab1/microblaze_0/libsrc/intc_v1_00_c/src/xintc_g.c: undefined reference to `timer_int_handler'
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:20:28
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make libs; exit;" Started...
make: Nothing to be done for `libs'.
Done.
At GMT date and time: 2005:7:28:5:20:32
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
./microblaze_0/lib//libxil.a(xintc_g.o)(.data+0x10):/xygdrive/c/edk_user_repository/lab1/microblaze_0/libsrc/intc_v1_00_c/src/xintc_g.c: undefined reference to `timer_int_handler'
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:21:43
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
./microblaze_0/lib//libxil.a(xintc_g.o)(.data+0x10):/xygdrive/c/edk_user_repository/lab1/microblaze_0/libsrc/intc_v1_00_c/src/xintc_g.c: undefined reference to `timer_int_handler'
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:21:50
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make init_bram; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
./microblaze_0/lib//libxil.a(xintc_g.o)(.data+0x10):/xygdrive/c/edk_user_repository/lab1/microblaze_0/libsrc/intc_v1_00_c/src/xintc_g.c: undefined reference to `timer_int_handler'
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:22:23
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
./microblaze_0/lib//libxil.a(xintc_g.o)(.data+0x10):/xygdrive/c/edk_user_repository/lab1/microblaze_0/libsrc/intc_v1_00_c/src/xintc_g.c: undefined reference to `timer_int_handler'
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:22:48
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
./microblaze_0/lib//libxil.a(xintc_g.o)(.data+0x10):/xygdrive/c/edk_user_repository/lab1/microblaze_0/libsrc/intc_v1_00_c/src/xintc_g.c: undefined reference to `timer_int_handler'
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:22:51
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
./microblaze_0/lib//libxil.a(xintc_g.o)(.data+0x10):/xygdrive/c/edk_user_repository/lab1/microblaze_0/libsrc/intc_v1_00_c/src/xintc_g.c: undefined reference to `timer_int_handler'
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:23:56
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make libs; exit;" Started...
make: Nothing to be done for `libs'.
Done.
At GMT date and time: 2005:7:28:5:23:59
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
./microblaze_0/lib//libxil.a(xintc_g.o)(.data+0x10):/xygdrive/c/edk_user_repository/lab1/microblaze_0/libsrc/intc_v1_00_c/src/xintc_g.c: undefined reference to `timer_int_handler'
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:25:6
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
./microblaze_0/lib//libxil.a(xintc_g.o)(.data+0x10):/xygdrive/c/edk_user_repository/lab1/microblaze_0/libsrc/intc_v1_00_c/src/xintc_g.c: undefined reference to `timer_int_handler'
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:25:39
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make TestApp_program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
./microblaze_0/lib//libxil.a(xintc_g.o)(.data+0x10):/xygdrive/c/edk_user_repository/lab1/microblaze_0/libsrc/intc_v1_00_c/src/xintc_g.c: undefined reference to `timer_int_handler'
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:26:26
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make TestApp_programclean; exit;" Started...
rm -f TestApp/executable.elf 
Done.
At GMT date and time: 2005:7:28:5:26:40
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make TestApp_program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
./microblaze_0/lib//libxil.a(xintc_g.o)(.data+0x10):/xygdrive/c/edk_user_repository/lab1/microblaze_0/libsrc/intc_v1_00_c/src/xintc_g.c: undefined reference to `timer_int_handler'
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:27:19
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make TestApp_program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
./microblaze_0/lib//libxil.a(xintc_g.o)(.data+0x10):/xygdrive/c/edk_user_repository/lab1/microblaze_0/libsrc/intc_v1_00_c/src/xintc_g.c: undefined reference to `timer_int_handler'
make: *** [TestApp/executable.elf] Error 1
Done.
At GMT date and time: 2005:7:28:5:28:38
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
*********************************************
Creating software libraries...
*********************************************
libgen -mhs system.mhs -p xc3s400ft256-4   system.mss
libgen
Xilinx EDK 6.3 Build EDK_Gmm.10
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
PM_SPEC -- Xilinx path component is <C:/EDK>

Command Line: libgen -mhs system.mhs -p xc3s400ft256-4 system.mss 

Output Directory (-od)		: C:\edk_user_repository\lab1\
Part (-p)			: spartan3

Software Specification file	: system.mss
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_v20_v1_10_b/data/opb_v20_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v1_00_b/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_emc_v1_10_b/data/opb_emc_v2_1_0.tcl
...
Done

Overriding IP level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
32 - overriding c_family value virtex2 to spartan3
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to spartan3
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:55 - overriding c_family value virtex2 to spartan3
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:56 - overriding c_instance value microblaze to microblaze_0
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to spartan3
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd:37
- overriding c_family value virtex2 to spartan3
opb_gpio (push_buttons_3bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (leds_8bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (led_cathodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (led_anodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3

Performing IP level DRCs on properties...

Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/emc_common_v2_00_a/data/emc_common_v2_1_0.
tcl ...Done
Address Map for Processor microblaze_0
  (0x00000000-0x00001fff) dlmb_cntlr	dlmb
  (0x00000000-0x00001fff) ilmb_cntlr	ilmb
  (0x80200100-0x802001ff) opb_intc_0	mb_opb
  (0x80200200-0x802002ff) debug_module	mb_opb
  (0x80200300-0x802003ff) RS232	mb_opb
  (0x80200400-0x802005ff) SRAM_256Kx32	mb_opb
  (0x80200600-0x802007ff) Push_Buttons_3Bit	mb_opb
  (0x80200800-0x802009ff) LEDs_8Bit	mb_opb
  (0x80200a00-0x80200bff) LED_cathodes	mb_opb
  (0x80200c00-0x80200dff) LED_anodes	mb_opb
  (0x80202000-0x80203fff) opb_bram_if_cntlr_1	mb_opb
  (0x80300000-0x803fffff) SRAM_256Kx32	mb_opb

Check platform configuration ...
opb_v20 (mb_opb) - C:\edk_user_repository\lab1\system.mhs:88 - 2 master(s) : 9
slave(s)
lmb_v10 (ilmb) - C:\edk_user_repository\lab1\system.mhs:112 - 1 master(s) : 1
slave(s)
lmb_v10 (dlmb) - C:\edk_user_repository\lab1\system.mhs:129 - 1 master(s) : 1
slave(s)

Check port drivers...
ERROR:MDT - opb_timer_1_Interrupt (Intr) -
   C:\edk_user_repository\lab1\system.mhs:47 - No driver found for connector!
ERROR:MDT - Errors occured while creating Hardware System
make: *** [microblaze_0/lib/libxil.a] Error 2
Done.

Saving MSS changes, if any.

Loading Project File..
Synchronization Done.
At GMT date and time: 2005:7:28:5:30:29
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
*********************************************
Creating software libraries...
*********************************************
libgen -mhs system.mhs -p xc3s400ft256-4   system.mss
libgen
Xilinx EDK 6.3 Build EDK_Gmm.10
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
PM_SPEC -- Xilinx path component is <C:/EDK>

Command Line: libgen -mhs system.mhs -p xc3s400ft256-4 system.mss 

Output Directory (-od)		: C:\edk_user_repository\lab1\
Part (-p)			: spartan3

Software Specification file	: system.mss
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_v20_v1_10_b/data/opb_v20_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v1_00_b/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_emc_v1_10_b/data/opb_emc_v2_1_0.tcl
...Done

Overriding IP level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
32 - overriding c_family value virtex2 to spartan3
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to spartan3
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:55 - overriding c_family value virtex2 to spartan3
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:56 - overriding c_instance value microblaze to microblaze_0
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to spartan3
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd:37
- overriding c_family value virtex2 to spartan3
opb_gpio (push_buttons_3bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (leds_8bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (led_cathodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (led_anodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3

Performing IP level DRCs on properties...

Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/emc_common_v2_00_a/data/emc_common_v2_1_0.
tcl ...Done
Address Map for Processor microblaze_0
  (0x00000000-0x00001fff) dlmb_cntlr	dlmb
  (0x00000000-0x00001fff) ilmb_cntlr	ilmb
  (0x80200100-0x802001ff) opb_intc_0	mb_opb
  (0x80200200-0x802002ff) debug_module	mb_opb
  (0x80200300-0x802003ff) RS232	mb_opb
  (0x80200400-0x802005ff) SRAM_256Kx32	mb_opb
  (0x80200600-0x802007ff) Push_Buttons_3Bit	mb_opb
  (0x80200800-0x802009ff) LEDs_8Bit	mb_opb
  (0x80200a00-0x80200bff) LED_cathodes	mb_opb
  (0x80200c00-0x80200dff) LED_anodes	mb_opb
  (0x80202000-0x80203fff) opb_bram_if_cntlr_1	mb_opb
  (0x80300000-0x803fffff) SRAM_256Kx32	mb_opb

Check platform configuration ...
opb_v20 (mb_opb) - C:\edk_user_repository\lab1\system.mhs:88 - 2 master(s) : 9
slave(s)
lmb_v10 (ilmb) - C:\edk_user_repository\lab1\system.mhs:112 - 1 master(s) : 1
slave(s)
lmb_v10 (dlmb) - C:\edk_user_repository\lab1\system.mhs:129 - 1 master(s) : 1
slave(s)

Check port drivers...

Check platform address map ...

Overriding system level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
40 - overriding c_num_intr_inputs value 2 to 1
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
41 - overriding c_kind_of_intr value 11111111111111111111111111111111 to
0b00000000000000000000000000000001
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
42 - overriding c_kind_of_edge value 11111111111111111111111111111111 to
0b00000000000000000000000000000001
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
43 - overriding c_kind_of_lvl value 11111111111111111111111111111111 to
0b00000000000000000000000000000000
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:34 - overriding c_memsize value 2048 to 8192
opb_v20 (mb_opb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_v20_v1_10_b\data\opb_v20_v2_1_0.mpd:39
- overriding c_num_masters value 4 to 2
opb_v20 (mb_opb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_v20_v1_10_b\data\opb_v20_v2_1_0.mpd:40
- overriding c_num_slaves value 4 to 9
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:34 - overriding c_memsize value 2048 to 8192
lmb_bram_if_cntlr (ilmb_cntlr) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_bram_if_cntlr_v1_00_b\data\lmb_bram_if
_cntlr_v2_1_0.mpd:41 - overriding c_mask value 0x00800000 to
0b00000000001000000000000000000000
lmb_v10 (ilmb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_v10_v1_00_a\data\lmb_v10_v2_1_0.mpd:35
- overriding c_lmb_num_slaves value 4 to 1
lmb_bram_if_cntlr (dlmb_cntlr) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_bram_if_cntlr_v1_00_b\data\lmb_bram_if
_cntlr_v2_1_0.mpd:41 - overriding c_mask value 0x00800000 to
0b00000000001000000000000000000000
lmb_v10 (dlmb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_v10_v1_00_a\data\lmb_v10_v2_1_0.mpd:35
- overriding c_lmb_num_slaves value 4 to 1

Running DRC Tcl procedures for OPTION SYSLEVEL_DRC_PROC...

Performing System level DRCs on properties...
INFO:MDT - List of peripherals addressable from processor instance microblaze_0
   : 
  - dlmb_cntlr
  - ilmb_cntlr
  - opb_intc_0
  - opb_bram_if_cntlr_1
  - debug_module
  - SRAM_256Kx32
  - RS232
  - Push_Buttons_3Bit
  - LEDs_8Bit
  - LED_cathodes
  - LED_anodes

Building Directory Structure for microblaze_0
rm: cannot remove directory `include': Permission denied
ERROR:MDT - Failed to remove C:\edk_user_repository\lab1\microblaze_0\include\.

LibGen Done. 
make: *** [microblaze_0/lib/libxil.a] Error 2
Done.
At GMT date and time: 2005:7:28:5:31:22
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
*********************************************
Creating software libraries...
*********************************************
libgen -mhs system.mhs -p xc3s400ft256-4   system.mss
libgen
Xilinx EDK 6.3 Build EDK_Gmm.10
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
PM_SPEC -- Xilinx path component is <C:/EDK>

Command Line: libgen -mhs system.mhs -p xc3s400ft256-4 system.mss 

Output Directory (-od)		: C:\edk_user_repository\lab1\
Part (-p)			: spartan3

Software Specification file	: system.mss
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_v20_v1_10_b/data/opb_v20_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v1_00_b/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_emc_v1_10_b/data/opb_emc_v2_1_0.tcl
...Done

Overriding IP level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
32 - overriding c_family value virtex2 to spartan3
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to spartan3
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:55 - overriding c_family value virtex2 to spartan3
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:56 - overriding c_instance value microblaze to microblaze_0
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to spartan3
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd:37
- overriding c_family value virtex2 to spartan3
opb_gpio (push_buttons_3bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (leds_8bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (led_cathodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (led_anodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3

Performing IP level DRCs on properties...

Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/emc_common_v2_00_a/data/emc_common_v2_1_0.
tcl ...Done
Address Map for Processor microblaze_0
  (0x00000000-0x00001fff) dlmb_cntlr	dlmb
  (0x00000000-0x00001fff) ilmb_cntlr	ilmb
  (0x80200100-0x802001ff) opb_intc_0	mb_opb
  (0x80200200-0x802002ff) debug_module	mb_opb
  (0x80200300-0x802003ff) RS232	mb_opb
  (0x80200400-0x802005ff) SRAM_256Kx32	mb_opb
  (0x80200600-0x802007ff) Push_Buttons_3Bit	mb_opb
  (0x80200800-0x802009ff) LEDs_8Bit	mb_opb
  (0x80200a00-0x80200bff) LED_cathodes	mb_opb
  (0x80200c00-0x80200dff) LED_anodes	mb_opb
  (0x80202000-0x80203fff) opb_bram_if_cntlr_1	mb_opb
  (0x80300000-0x803fffff) SRAM_256Kx32	mb_opb

Check platform configuration ...
opb_v20 (mb_opb) - C:\edk_user_repository\lab1\system.mhs:88 - 2 master(s) : 9
slave(s)
lmb_v10 (ilmb) - C:\edk_user_repository\lab1\system.mhs:112 - 1 master(s) : 1
slave(s)
lmb_v10 (dlmb) - C:\edk_user_repository\lab1\system.mhs:129 - 1 master(s) : 1
slave(s)

Check port drivers...

Check platform address map ...

Overriding system level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
40 - overriding c_num_intr_inputs value 2 to 1
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
41 - overriding c_kind_of_intr value 11111111111111111111111111111111 to
0b00000000000000000000000000000001
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
42 - overriding c_kind_of_edge value 11111111111111111111111111111111 to
0b00000000000000000000000000000001
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
43 - overriding c_kind_of_lvl value 11111111111111111111111111111111 to
0b00000000000000000000000000000000
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:34 - overriding c_memsize value 2048 to 8192
opb_v20 (mb_opb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_v20_v1_10_b\data\opb_v20_v2_1_0.mpd:39
- overriding c_num_masters value 4 to 2
opb_v20 (mb_opb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_v20_v1_10_b\data\opb_v20_v2_1_0.mpd:40
- overriding c_num_slaves value 4 to 9
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:34 - overriding c_memsize value 2048 to 8192
lmb_bram_if_cntlr (ilmb_cntlr) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_bram_if_cntlr_v1_00_b\data\lmb_bram_if
_cntlr_v2_1_0.mpd:41 - overriding c_mask value 0x00800000 to
0b00000000001000000000000000000000
lmb_v10 (ilmb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_v10_v1_00_a\data\lmb_v10_v2_1_0.mpd:35
- overriding c_lmb_num_slaves value 4 to 1
lmb_bram_if_cntlr (dlmb_cntlr) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_bram_if_cntlr_v1_00_b\data\lmb_bram_if
_cntlr_v2_1_0.mpd:41 - overriding c_mask value 0x00800000 to
0b00000000001000000000000000000000
lmb_v10 (dlmb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_v10_v1_00_a\data\lmb_v10_v2_1_0.mpd:35
- overriding c_lmb_num_slaves value 4 to 1

Running DRC Tcl procedures for OPTION SYSLEVEL_DRC_PROC...

Performing System level DRCs on properties...
INFO:MDT - List of peripherals addressable from processor instance microblaze_0
   : 
  - dlmb_cntlr
  - ilmb_cntlr
  - opb_intc_0
  - opb_bram_if_cntlr_1
  - debug_module
  - SRAM_256Kx32
  - RS232
  - Push_Buttons_3Bit
  - LEDs_8Bit
  - LED_cathodes
  - LED_anodes

Building Directory Structure for microblaze_0
rm: cannot remove directory `include': Permission denied
ERROR:MDT - Failed to remove C:\edk_user_repository\lab1\microblaze_0\include\.

LibGen Done. 
make: *** [microblaze_0/lib/libxil.a] Error 2
Done.
At GMT date and time: 2005:7:28:5:31:56
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
*********************************************
Creating software libraries...
*********************************************
libgen -mhs system.mhs -p xc3s400ft256-4   system.mss
libgen
Xilinx EDK 6.3 Build EDK_Gmm.10
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
PM_SPEC -- Xilinx path component is <C:/EDK>

Command Line: libgen -mhs system.mhs -p xc3s400ft256-4 system.mss 

Output Directory (-od)		: C:\edk_user_repository\lab1\
Part (-p)			: spartan3

Software Specification file	: system.mss
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_v20_v1_10_b/data/opb_v20_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v1_00_b/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_emc_v1_10_b/data/opb_emc_v2_1_0.tcl
...Done

Overriding IP level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
32 - overriding c_family value virtex2 to spartan3
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to spartan3
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:55 - overriding c_family value virtex2 to spartan3
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:56 - overriding c_instance value microblaze to microblaze_0
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to spartan3
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd:37
- overriding c_family value virtex2 to spartan3
opb_gpio (push_buttons_3bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (leds_8bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (led_cathodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (led_anodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3

Performing IP level DRCs on properties...

Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/emc_common_v2_00_a/data/emc_common_v2_1_0.
tcl ...Done
Address Map for Processor microblaze_0
  (0x00000000-0x00001fff) dlmb_cntlr	dlmb
  (0x00000000-0x00001fff) ilmb_cntlr	ilmb
  (0x80200100-0x802001ff) opb_intc_0	mb_opb
  (0x80200200-0x802002ff) debug_module	mb_opb
  (0x80200300-0x802003ff) RS232	mb_opb
  (0x80200400-0x802005ff) SRAM_256Kx32	mb_opb
  (0x80200600-0x802007ff) Push_Buttons_3Bit	mb_opb
  (0x80200800-0x802009ff) LEDs_8Bit	mb_opb
  (0x80200a00-0x80200bff) LED_cathodes	mb_opb
  (0x80200c00-0x80200dff) LED_anodes	mb_opb
  (0x80202000-0x80203fff) opb_bram_if_cntlr_1	mb_opb
  (0x80300000-0x803fffff) SRAM_256Kx32	mb_opb

Check platform configuration ...
opb_v20 (mb_opb) - C:\edk_user_repository\lab1\system.mhs:88 - 2 master(s) : 9
slave(s)
lmb_v10 (ilmb) - C:\edk_user_repository\lab1\system.mhs:112 - 1 master(s) : 1
slave(s)
lmb_v10 (dlmb) - C:\edk_user_repository\lab1\system.mhs:129 - 1 master(s) : 1
slave(s)

Check port drivers...

Check platform address map ...

Overriding system level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
40 - overriding c_num_intr_inputs value 2 to 1
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
41 - overriding c_kind_of_intr value 11111111111111111111111111111111 to
0b00000000000000000000000000000001
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
42 - overriding c_kind_of_edge value 11111111111111111111111111111111 to
0b00000000000000000000000000000001
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
43 - overriding c_kind_of_lvl value 11111111111111111111111111111111 to
0b00000000000000000000000000000000
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:34 - overriding c_memsize value 2048 to 8192
opb_v20 (mb_opb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_v20_v1_10_b\data\opb_v20_v2_1_0.mpd:39
- overriding c_num_masters value 4 to 2
opb_v20 (mb_opb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_v20_v1_10_b\data\opb_v20_v2_1_0.mpd:40
- overriding c_num_slaves value 4 to 9
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:34 - overriding c_memsize value 2048 to 8192
lmb_bram_if_cntlr (ilmb_cntlr) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_bram_if_cntlr_v1_00_b\data\lmb_bram_if
_cntlr_v2_1_0.mpd:41 - overriding c_mask value 0x00800000 to
0b00000000001000000000000000000000
lmb_v10 (ilmb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_v10_v1_00_a\data\lmb_v10_v2_1_0.mpd:35
- overriding c_lmb_num_slaves value 4 to 1
lmb_bram_if_cntlr (dlmb_cntlr) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_bram_if_cntlr_v1_00_b\data\lmb_bram_if
_cntlr_v2_1_0.mpd:41 - overriding c_mask value 0x00800000 to
0b00000000001000000000000000000000
lmb_v10 (dlmb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_v10_v1_00_a\data\lmb_v10_v2_1_0.mpd:35
- overriding c_lmb_num_slaves value 4 to 1

Running DRC Tcl procedures for OPTION SYSLEVEL_DRC_PROC...

Performing System level DRCs on properties...
INFO:MDT - List of peripherals addressable from processor instance microblaze_0
   : 
  - dlmb_cntlr
  - ilmb_cntlr
  - opb_intc_0
  - opb_bram_if_cntlr_1
  - debug_module
  - SRAM_256Kx32
  - RS232
  - Push_Buttons_3Bit
  - LEDs_8Bit
  - LED_cathodes
  - LED_anodes

Building Directory Structure for microblaze_0

Generating platform libraries and device drivers ...

Running CopyFiles ...

Copying files for os standalone_v1_00_a from
C:\EDK\sw\lib\bsp\standalone_v1_00_a\src\ to
C:\edk_user_repository\lab1\microblaze_0\libsrc\standalone_v1_00_a\ ...

Copying files for driver intc_v1_00_c from
C:\EDK\sw\XilinxProcessorIPLib\drivers\intc_v1_00_c\src\ to
C:\edk_user_repository\lab1\microblaze_0\libsrc\intc_v1_00_c\ ...

Copying files for driver uartlite_v1_00_b from
C:\EDK\sw\XilinxProcessorIPLib\drivers\uartlite_v1_00_b\src\ to
C:\edk_user_repository\lab1\microblaze_0\libsrc\uartlite_v1_00_b\ ...

Copying files for driver emc_v1_00_a from
C:\EDK\sw\XilinxProcessorIPLib\drivers\emc_v1_00_a\src\ to
C:\edk_user_repository\lab1\microblaze_0\libsrc\emc_v1_00_a\ ...

Copying files for driver gpio_v2_00_a from
C:\EDK\sw\XilinxProcessorIPLib\drivers\gpio_v2_00_a\src\ to
C:\edk_user_repository\lab1\microblaze_0\libsrc\gpio_v2_00_a\ ...

Copying files for driver cpu_v1_00_a from
C:\EDK\sw\XilinxProcessorIPLib\drivers\cpu_v1_00_a\src\ to
C:\edk_user_repository\lab1\microblaze_0\libsrc\cpu_v1_00_a\ ...

Running DRCs for OSes, Drivers and Libraries ... 

Running generate for OS'es, Drivers and Libraries ... 
WARNING: The parameter USE_DCR for the intc driver has been deprecated.  Any reference to this parameter in the MSS file will be ignored.
define_config_file: XNullHandler
Copying Library Files ...

Running post_generate for OS'es, Drivers and Libraries ... 

Running make for Drivers and Libraries ... 

Configuring make for target include using:

make -s include "COMPILER=mb-gcc" "ARCHIVER=mb-ar"
"COMPILER_FLAGS=-mno-xl-soft-mul -O2 -c" "EXTRA_COMPILER_FLAGS=-g" 

Configuring make for target libs using:

make -s libs "COMPILER=mb-gcc" "ARCHIVER=mb-ar"
"COMPILER_FLAGS=-mno-xl-soft-mul -O2 -c" "EXTRA_COMPILER_FLAGS=-g" 
Compiling common
Compiling ipif
Compiling  microblaze_disable_dcache.s
Compiling  microblaze_disable_exceptions.s
Compiling  microblaze_disable_icache.s
Compiling  microblaze_disable_interrupts.s
Compiling  microblaze_enable_dcache.s
Compiling  microblaze_enable_exceptions.s
Compiling  microblaze_enable_icache.s
Compiling  microblaze_enable_interrupts.s
Compiling  microblaze_init_dcache_range.s
Compiling  microblaze_init_icache_range.s
Compiling  microblaze_update_dcache.s
Compiling  microblaze_update_icache.s
Compiling  inbyte.c
Compiling  microblaze_exception_handler.c
Compiling  microblaze_exceptions_g.c
Compiling  microblaze_interrupt_handler.c
Compiling  microblaze_interrupts_g.c
Compiling  outbyte.c
Compiling  hw_exception_handler.S
Compiling intc
Compiling uartlite
Compiling emc
Compiling gpio
Compiling cpu

Libraries generated in C:\edk_user_repository\lab1\microblaze_0\lib\ directory

Running execs_generate for OS'es, Drivers and Libraries ... 

LibGen Done. 
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
mb-size TestApp/executable.elf 
   text	   data	    bss	    dec	    hex	filename
   4776	    360	      4	   5140	   1414	TestApp/executable.elf
Done.
At GMT date and time: 2005:7:28:5:32:29
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make download; exit;" Started...
****************************************************
Creating system netlist for hardware specification..
****************************************************
platgen -p xc3s400ft256-4 -lang vhdl   -st xst system.mhs

Release Xilinx EDK 6.3 - platgen EDK_Gmm.10
Copyright (c) 1995-2003 Xilinx, Inc.  All rights reserved.

PM_SPEC -- Xilinx path component is <C:/EDK>

Command Line: platgen -p xc3s400ft256-4 -lang vhdl -st xst system.mhs 

Parse system.mhs ...

Read MPD definitions ...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_v20_v1_10_b/data/opb_v20_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v1_00_b/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_emc_v1_10_b/data/opb_emc_v2_1_0.tcl
...Done

Overriding IP level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
32 - overriding c_family value virtex2 to spartan3
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to spartan3
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:55 - overriding c_family value virtex2 to spartan3
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:56 - overriding c_instance value microblaze to microblaze_0
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to spartan3
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd:37
- overriding c_family value virtex2 to spartan3
opb_gpio (push_buttons_3bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (leds_8bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (led_cathodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3
opb_gpio (led_anodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to spartan3

Performing IP level DRCs on properties...

Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/emc_common_v2_00_a/data/emc_common_v2_1_0.
tcl ...Done
Address Map for Processor microblaze_0
  (0x00000000-0x00001fff) dlmb_cntlr	dlmb
  (0x00000000-0x00001fff) ilmb_cntlr	ilmb
  (0x80200100-0x802001ff) opb_intc_0	mb_opb
  (0x80200200-0x802002ff) debug_module	mb_opb
  (0x80200300-0x802003ff) RS232	mb_opb
  (0x80200400-0x802005ff) SRAM_256Kx32	mb_opb
  (0x80200600-0x802007ff) Push_Buttons_3Bit	mb_opb
  (0x80200800-0x802009ff) LEDs_8Bit	mb_opb
  (0x80200a00-0x80200bff) LED_cathodes	mb_opb
  (0x80200c00-0x80200dff) LED_anodes	mb_opb
  (0x80202000-0x80203fff) opb_bram_if_cntlr_1	mb_opb
  (0x80300000-0x803fffff) SRAM_256Kx32	mb_opb

Check platform configuration ...
opb_v20 (mb_opb) - C:\edk_user_repository\lab1\system.mhs:88 - 2 master(s) : 9
slave(s)
lmb_v10 (ilmb) - C:\edk_user_repository\lab1\system.mhs:112 - 1 master(s) : 1
slave(s)
lmb_v10 (dlmb) - C:\edk_user_repository\lab1\system.mhs:129 - 1 master(s) : 1
slave(s)

Check port drivers...

Check platform address map ...

Overriding system level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
40 - overriding c_num_intr_inputs value 2 to 1
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
41 - overriding c_kind_of_intr value 11111111111111111111111111111111 to
0b00000000000000000000000000000001
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
42 - overriding c_kind_of_edge value 11111111111111111111111111111111 to
0b00000000000000000000000000000001
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
43 - overriding c_kind_of_lvl value 11111111111111111111111111111111 to
0b00000000000000000000000000000000
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:34 - overriding c_memsize value 2048 to 8192
opb_v20 (mb_opb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_v20_v1_10_b\data\opb_v20_v2_1_0.mpd:39
- overriding c_num_masters value 4 to 2
opb_v20 (mb_opb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_v20_v1_10_b\data\opb_v20_v2_1_0.mpd:40
- overriding c_num_slaves value 4 to 9
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:34 - overriding c_memsize value 2048 to 8192
lmb_bram_if_cntlr (ilmb_cntlr) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_bram_if_cntlr_v1_00_b\data\lmb_bram_if
_cntlr_v2_1_0.mpd:41 - overriding c_mask value 0x00800000 to
0b00000000001000000000000000000000
lmb_v10 (ilmb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_v10_v1_00_a\data\lmb_v10_v2_1_0.mpd:35
- overriding c_lmb_num_slaves value 4 to 1
lmb_bram_if_cntlr (dlmb_cntlr) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_bram_if_cntlr_v1_00_b\data\lmb_bram_if
_cntlr_v2_1_0.mpd:41 - overriding c_mask value 0x00800000 to
0b00000000001000000000000000000000
lmb_v10 (dlmb) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_v10_v1_00_a\data\lmb_v10_v2_1_0.mpd:35
- overriding c_lmb_num_slaves value 4 to 1

Running DRC Tcl procedures for OPTION SYSLEVEL_DRC_PROC...

Performing System level DRCs on properties...

Running UPDATE Tcl procedures for OPTION PLATGEN_SYSLEVEL_UPDATE_PROC...

Modify defaults ...

Performing XLPP processing on licensed instances ...
Completion time: 0.00 seconds

Creating hardware output directories ...

Managing hardware (BBD-specified) netlist files ...

Managing cache ...
bram_block (opb_bram_if_cntlr_1_bram) -
C:\edk_user_repository\lab1\system.mhs:50 - Copying cache implementation netlist
opb_bram_if_cntlr (opb_bram_if_cntlr_1) -
C:\edk_user_repository\lab1\system.mhs:56 - Copying cache implementation netlist
microblaze (microblaze_0) - C:\edk_user_repository\lab1\system.mhs:67 - Copying
cache implementation netlist
bram_block (lmb_bram) - C:\edk_user_repository\lab1\system.mhs:96 - Copying
cache implementation netlist
lmb_bram_if_cntlr (ilmb_cntlr) - C:\edk_user_repository\lab1\system.mhs:103 -
Copying cache implementation netlist
lmb_v10 (ilmb) - C:\edk_user_repository\lab1\system.mhs:112 - Copying cache
implementation netlist
lmb_bram_if_cntlr (dlmb_cntlr) - C:\edk_user_repository\lab1\system.mhs:120 -
Copying cache implementation netlist
lmb_v10 (dlmb) - C:\edk_user_repository\lab1\system.mhs:129 - Copying cache
implementation netlist
opb_mdm (debug_module) - C:\edk_user_repository\lab1\system.mhs:137 - Copying
cache implementation netlist
util_bus_split (sram_256kx32_util_bus_split_0) -
C:\edk_user_repository\lab1\system.mhs:155 - Copying cache implementation
netlist
opb_emc (sram_256kx32) - C:\edk_user_repository\lab1\system.mhs:165 - Copying
cache implementation netlist
opb_uartlite (rs232) - C:\edk_user_repository\lab1\system.mhs:190 - Copying
cache implementation netlist
opb_gpio (push_buttons_3bit) - C:\edk_user_repository\lab1\system.mhs:207 -
Copying cache implementation netlist
opb_gpio (leds_8bit) - C:\edk_user_repository\lab1\system.mhs:221 - Copying
cache implementation netlist
opb_gpio (led_cathodes) - C:\edk_user_repository\lab1\system.mhs:235 - Copying
cache implementation netlist
opb_gpio (led_anodes) - C:\edk_user_repository\lab1\system.mhs:249 - Copying
cache implementation netlist

Elaborating instances ...
bram_block (opb_bram_if_cntlr_1_bram) -
C:\edk_user_repository\lab1\system.mhs:50 - elaborating IP
bram_block (lmb_bram) - C:\edk_user_repository\lab1\system.mhs:96 - elaborating
IP

Writing HDL for elaborated instances ...

Inserting wrapper level ...
Completion time: 6.00 seconds

Constructing platform-level signal connectivity ...
Completion time: 5.00 seconds

Writing (top-level) BMM ...
Writing BMM - C:\edk_user_repository\lab1\implementation\system.bmm

Writing (top-level and wrappers) HDL ...

Generating synthesis project file ...

Running XST synthesis ...
INFO:MDT - The following instances are synthesized with XST. The MPD option
   IMP_NETLIST=TRUE indicates that a NGC file is to be produced using XST
   synthesis. IMP_NETLIST=FALSE (default) instances are not synthesized. A batch
   file, synthesis.sh, has been created that allows you to synthesize those
   instances in your specified synthesis tool of choice.
opb_intc_0_wrapper (opb_intc_0) - C:\edk_user_repository\lab1\system.mhs:40 -
Running XST synthesis
mb_opb_wrapper (mb_opb) - C:\edk_user_repository\lab1\system.mhs:88 - Running
XST synthesis

Running NGCBUILD ...

Rebuilding cache ...
Total run time: 53.00 seconds
Running synthesis...
bash -c "cd synthesis; ./synthesis.sh; cd .."
Release 6.3i - xst G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
--> PM_SPEC -- Xilinx path component is <C:/EDK>

TABLE OF CONTENTS
  1) Synthesis Options Summary
  2) HDL Compilation
  3) HDL Analysis
  4) HDL Synthesis
  5) Advanced HDL Synthesis
     5.1) HDL Synthesis Report
  6) Low Level Synthesis
  7) Final Report
     7.1) Device utilization summary
     7.2) TIMING REPORT


=========================================================================
*                      Synthesis Options Summary                        *
=========================================================================
---- Source Parameters
Input Format                       : MIXED
Input File Name                    : system_xst.prj

---- Target Parameters
Target Device                      : xc3s400ft256-4
Output File Name                   : ../implementation/system.ngc

---- Source Options
Top Module Name                    : system

---- Target Options
Add IO Buffers                     : NO

---- General Options
Optimization Effort                : 2
Optimization Goal                  : speed
RTL Output                         : YES
Hierarchy Separator                : /

=========================================================================


=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd in Library work.
Entity <system> (Architecture <STRUCTURE>) compiled.

=========================================================================
*                            HDL Analysis                               *
=========================================================================
Analyzing Entity <system> (Architecture <STRUCTURE>).
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1604: Generating a Black Box for component <IBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1610: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1616: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1622: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1628: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1634: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1640: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1646: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1652: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1658: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1664: Generating a Black Box for component <IBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1670: Generating a Black Box for component <IBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1676: Generating a Black Box for component <IBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1682: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1688: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1694: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1700: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1706: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1712: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1718: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1724: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1730: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1736: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1742: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1748: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1754: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1760: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1766: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1772: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1778: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1784: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1790: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1798: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1806: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1814: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1822: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1830: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1838: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1846: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1854: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1862: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1870: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1878: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1886: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1894: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1902: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1910: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1918: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1926: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1934: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1942: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1950: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1958: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1966: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1974: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1982: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1990: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 1998: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2006: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2014: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2022: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2030: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2038: Generating a Black Box for component <IOBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2046: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2052: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2058: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2064: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2070: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2076: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2082: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2088: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2094: Generating a Black Box for component <BUFGP>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2100: Generating a Black Box for component <IBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2106: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2112: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2118: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2124: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2130: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2136: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2142: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2148: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2154: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2160: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2166: Generating a Black Box for component <OBUF>.
WARNING:Xst:766 - c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd line 2172: Generating a Black Box for component <OBUF>.
Entity <system> analyzed. Unit <system> generated.


=========================================================================
*                           HDL Synthesis                               *
=========================================================================

Synthesizing Unit <system>.
    Related source file is c:/edk_user_repository/lab1/synthesis/../hdl/system.vhd.
Unit <system> synthesized.


=========================================================================
*                       Advanced HDL Synthesis                          *
=========================================================================

Advanced RAM inference ...
Advanced multiplier inference ...
Advanced Registered AddSub inference ...
Dynamic shift register inference ...

=========================================================================
HDL Synthesis Report

Found no macro
=========================================================================

=========================================================================
*                         Low Level Synthesis                           *
=========================================================================

Optimizing unit <system> ...
Loading device for application Xst from file '3s400.nph' in environment C:/Xilinx.

Mapping all equations...
Building and optimizing final netlist ...

=========================================================================
*                            Final Report                               *
=========================================================================
Final Results
RTL Top Level Output File Name     : ../implementation/system.ngr
Top Level Output File Name         : ../implementation/system.ngc
Output Format                      : ngc
Optimization Goal                  : speed
Keep Hierarchy                     : no

Design Statistics
# IOs                              : 85

Cell Usage :
# BELS                             : 2
#      GND                         : 1
#      VCC                         : 1
# Clock Buffers                    : 1
#      BUFGP                       : 1
# IO Buffers                       : 84
#      IBUF                        : 5
#      IOBUF                       : 32
#      OBUF                        : 47
# Others                           : 18
#      debug_module_wrapper        : 1
#      dlmb_cntlr_wrapper          : 1
#      dlmb_wrapper                : 1
#      ilmb_cntlr_wrapper          : 1
#      ilmb_wrapper                : 1
#      led_anodes_wrapper          : 1
#      led_cathodes_wrapper        : 1
#      leds_8bit_wrapper           : 1
#      lmb_bram_wrapper            : 1
#      mb_opb_wrapper              : 1
#      microblaze_0_wrapper        : 1
#      opb_bram_if_cntlr_1_bram_wrapper: 1
#      opb_bram_if_cntlr_1_wrapper : 1
#      opb_intc_0_wrapper          : 1
#      push_buttons_3bit_wrapper   : 1
#      rs232_wrapper               : 1
#      sram_256kx32_util_bus_split_0_wrapper: 1
#      sram_256kx32_wrapper        : 1
=========================================================================

Device utilization summary:
---------------------------

Selected Device : 3s400ft256-4 

 Number of bonded IOBs:                 84  out of    173    48%  
 Number of GCLKs:                        1  out of      8    12%  


=========================================================================
TIMING REPORT

NOTE: THESE TIMING NUMBERS ARE ONLY A SYNTHESIS ESTIMATE.
      FOR ACCURATE TIMING INFORMATION PLEASE REFER TO THE TRACE REPORT
      GENERATED AFTER PLACE-and-ROUTE.

Clock Information:
------------------
No clock signals found in this design

Timing Summary:
---------------
Speed Grade: -4

   Minimum period: No path found
   Minimum input arrival time before clock: No path found
   Maximum output required time after clock: No path found
   Maximum combinational path delay: 5.358ns

Timing Detail:
--------------
All values displayed in nanoseconds (ns)

-------------------------------------------------------------------------
Timing constraint: Default path analysis
Delay:               5.358ns (Levels of Logic = 1)
  Source:            sram_256kx32:Mem_DQ_T<27> (PAD)
  Destination:       fpga_0_SRAM_256Kx32_Mem_DQ_pin<27> (PAD)

  Data Path: sram_256kx32:Mem_DQ_T<27> to fpga_0_SRAM_256Kx32_Mem_DQ_pin<27>
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
    sram_256kx32_wrapper:Mem_DQ_T<27>    1   0.000   0.240  sram_256kx32 (fpga_0_SRAM_256Kx32_Mem_DQ_T<27>)
     IOBUF:T->IO               5.118          iobuf_58 (fpga_0_SRAM_256Kx32_Mem_DQ_pin<27>)
    ----------------------------------------
    Total                      5.358ns (5.118ns logic, 0.240ns route)
                                       (95.5% logic, 4.5% route)

=========================================================================
CPU : 11.63 / 12.67 s | Elapsed : 11.00 / 12.00 s
 
--> 

Total memory usage is 77432 kilobytes


Copying Xilinx Implementation tool scripts..
*********************************************
Running Xilinx Implementation tools..
*********************************************
xflow -wd implementation -p xc3s400ft256-4 -implement fast_runtime.opt system.ngc
Release 6.3i - Xflow G.35
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
xflow.exe -wd implementation -p xc3s400ft256-4 -implement fast_runtime.opt
system.ngc  
PM_SPEC -- Xilinx path component is <C:/EDK>

Using Flow File: C:/edk_user_repository/lab1/implementation/fpga.flw 
Using Option File(s): 
 C:/edk_user_repository/lab1/implementation/fast_runtime.opt 

Creating Script File ... 

#----------------------------------------------#
# Starting program ngdbuild
# ngdbuild -p xc3s400ft256-4 -nt timestamp -bm system.bmm
C:/edk_user_repository/lab1/implementation/system.ngc -uc system.ucf system.ngd 
#----------------------------------------------#
Release 6.3i - ngdbuild G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
PM_SPEC -- Xilinx path component is <C:/EDK>

Command Line: ngdbuild -p xc3s400ft256-4 -nt timestamp -bm system.bmm -uc
system.ucf C:/edk_user_repository/lab1/implementation/system.ngc system.ngd 

Reading NGO file "C:/edk_user_repository/lab1/implementation/system.ngc" ...
Reading component libraries for design expansion...
Loading design module
"C:/edk_user_repository/lab1/implementation/opb_intc_0_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/opb_bram_if_cntlr_1_bram_wrapper.ngc
"...
Loading design module
"C:/edk_user_repository/lab1/implementation/opb_bram_if_cntlr_1_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/microblaze_0_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/mb_opb_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/lmb_bram_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/ilmb_cntlr_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/ilmb_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/dlmb_cntlr_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/dlmb_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/debug_module_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/sram_256kx32_util_bus_split_0_wrappe
r.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/sram_256kx32_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/rs232_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/push_buttons_3bit_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/leds_8bit_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/led_cathodes_wrapper.ngc"...
Loading design module
"C:/edk_user_repository/lab1/implementation/led_anodes_wrapper.ngc"...

Annotating constraints to design from file "system.ucf" ...

Checking timing specifications ...

Processing BMM file ...

Checking expanded design ...
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_ABUS_REG_BIT_I24' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_ABUS_REG_BIT_I25' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_ABUS_REG_BIT_I26' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_ABUS_REG_BIT_I30' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_ABUS_REG_BIT_I31' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I0' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I1' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I2' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I3' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I4' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I5' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I6' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I7' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I8' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I9' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I10' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I11' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I12' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I13' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I14' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I15' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I16' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I17' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I18' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I19' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I20' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I21' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I22' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I23' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I24' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I25' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I26' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I27' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I28' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'opb_intc_0/opb_intc_0/OPB_INTFC_I/OPB_DBUS_REG_BIT_I29' has unconnected
   output pin
WARNING:NgdBuild:454 - logical net 'mb_opb_OPB_seqAddr' has no load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<11>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<10>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<9>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<8>' has no
   load
WARNING:NgdBuild:454 - logical net 'net_vcc9<8>' has no load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<7>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<6>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<5>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<4>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<3>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<2>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<1>' has no
   load
WARNING:NgdBuild:454 - logical net 'fpga_0_SRAM_256Kx32_Mem_A_split<0>' has no
   load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<0>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<1>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<2>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<3>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<4>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<5>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<6>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<7>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<8>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<9>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<10>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<11>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<12>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<13>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<14>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<15>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<16>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<17>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<18>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<19>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<20>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<21>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<22>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<23>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<24>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<25>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<26>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<27>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<28>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<29>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<30>' has
   no load
WARNING:NgdBuild:454 - logical net 'opb_bram_if_cntlr_1_bram/BRAM_Din_B<31>' has
   no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<0>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_AS' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Write' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Read' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<31>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<30>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<29>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<28>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<27>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<26>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<25>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<24>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<23>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<22>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<21>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<20>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<19>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_WRITE' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<18>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_ADDR<0>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<17>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<16>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<15>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<14>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<13>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<12>' has no
   load
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Iopb_Interface_I/Iopb_Interrupt' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<11>' has no
   load
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Dopb_Interface_I/Dopb_Interrupt' has no load
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/PC_Module_I/PC_Bit_I0/Carry_Out' has
   no load
WARNING:NgdBuild:452 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/word_r1_r2_unalignment' has no driver
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/word_r1_r2_unalignment' has no load
WARNING:NgdBuild:452 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/word_r1_imm_unalignment' has no driver
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/word_r1_imm_unalignment' has no load
WARNING:NgdBuild:452 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/halfword_unalignment' has no driver
WARNING:NgdBuild:454 - logical net
   'microblaze_0/microblaze_0/Data_Flow_I/halfword_unalignment' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<6>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<5>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<10>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<9>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<8>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<7>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<4>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<3>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<2>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<1>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Data_Address<0>' has no
   load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_ADDR<4>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_ADDR<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_ADDR<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/REG_ADDR<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<9>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<8>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<7>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<6>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<5>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<4>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MSR_REG<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PREFETCH_ADDR<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PREFETCH_ADDR<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PREFETCH_ADDR<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<31>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<30>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<29>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<28>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<27>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<26>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<25>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<24>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<23>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<22>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<21>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<20>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<19>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<18>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<17>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<16>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<15>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<14>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<13>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<12>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<11>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<10>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<9>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<8>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<7>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<6>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<5>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<4>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/PC_EX<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/INTERRUPT_TAKEN' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<6>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<0>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Branch_Instr' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<17>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<8>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<9>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<10>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<22>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<31>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<11>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<12>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<13>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<14>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<7>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<16>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<15>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<19>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<18>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<21>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<20>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<28>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<27>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<24>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<23>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/Trace_Instr_EX<29>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze_0/MB_Halted' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_hwXfer' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_fwXfer' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_dwXfer' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<0>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_beXfer' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<31>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<30>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<29>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<28>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<27>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<26>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<25>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<24>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<23>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<22>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<21>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<20>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<19>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<18>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<17>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<16>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<15>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<14>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<13>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<12>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<11>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<10>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<9>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<8>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<7>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<6>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<5>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<4>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<3>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<2>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_wrDBus<1>' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_dwAck' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_beAck' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_fwAck' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_toutSup' has no load
WARNING:NgdBuild:454 - logical net 'mb_opb/OPB_hwAck' has no load
WARNING:NgdBuild:454 - logical net 'debug_module/bscan_drck1' has no load
WARNING:NgdBuild:478 - clock net 'debug_module/bscan_drck1' drives no clock pins
WARNING:NgdBuild:454 - logical net 'debug_module/bscan_reset' has no load
WARNING:NgdBuild:454 - logical net 'debug_module/bscan_sel1' has no load
WARNING:NgdBuild:454 - logical net 'debug_module/Interrupt' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_QWEN<2>' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_QWEN<1>' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_QWEN<3>' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_RNW' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_CE<0>' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_RPN' has no load
WARNING:NgdBuild:454 - logical net 'sram_256kx32/Mem_QWEN<0>' has no load
WARNING:NgdBuild:454 - logical net 'push_buttons_3bit/GPIO_IO_T<2>' has no load

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings: 258

Total memory usage is 55400 kilobytes

Writing NGD file "system.ngd" ...

Writing NGDBUILD log file "system.bld"...

NGDBUILD done.



#----------------------------------------------#
# Starting program map
# map -o system_map.ncd -pr b system.ngd system.pcf 
#----------------------------------------------#
Release 6.3i - Map G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
PM_SPEC -- Xilinx path component is <C:/EDK>
Using target part "3s400ft256-4".
Removing unused or disabled logic...
Running cover...
Writing file system_map.ngm...
Running directed packing...
Running delay-based LUT packing...
Running related packing...
Writing design file "system_map.ncd"...

Design Summary:
Number of errors:      0
Number of warnings:   71
Logic Utilization:
  Number of Slice Flip Flops:       1,536 out of   7,168   21%
  Number of 4 input LUTs:           1,859 out of   7,168   25%
Logic Distribution:
  Number of occupied Slices:                        1,595 out of   3,584   44%
    Number of Slices containing only related logic:   1,595 out of   1,595  100%
    Number of Slices containing unrelated logic:          0 out of   1,595    0%
      *See NOTES below for an explanation of the effects of unrelated logic
Total Number 4 input LUTs:          2,320 out of   7,168   32%
  Number used as logic:              1,859
  Number used as a route-thru:          44
  Number used for Dual Port RAMs:      256
    (Two LUTs used per Dual Port RAM)
  Number used as Shift registers:      161
  Number of bonded IOBs:               85 out of     173   49%
    IOB Flip Flops:                    81
  Number of Block RAMs:                8 out of      16   50%
  Number of MULT18X18s:                3 out of      16   18%
  Number of GCLKs:                     2 out of       8   25%
  Number of BSCANs:                    1 out of       1  100%

   Number of RPM macros:            5
Total equivalent gate count for design:  589,067
Additional JTAG gate count for IOBs:  4,080
Peak Memory Usage:  97 MB

NOTES:

   Related logic is defined as being logic that shares connectivity -
   e.g. two LUTs are "related" if they share common inputs.
   When assembling slices, Map gives priority to combine logic that
   is related.  Doing so results in the best timing performance.

   Unrelated logic shares no connectivity.  Map will only begin
   packing unrelated logic into a slice once 99% of the slices are
   occupied through related logic packing.

   Note that once logic distribution reaches the 99% level through
   related logic packing, this does not mean the device is completely
   utilized.  Unrelated logic packing will then begin, continuing until
   all usable LUTs and FFs are occupied.  Depending on your timing
   budget, increased levels of unrelated logic packing may adversely
   affect the overall timing performance of your design.


Mapping completed.
See MAP report file "system_map.mrp" for details.



#----------------------------------------------#
# Starting program par
# par -w -ol std system_map.ncd system.ncd system.pcf 
#----------------------------------------------#
Release 6.3i - Par G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.


PM_SPEC -- Xilinx path component is <C:/EDK>


Constraints file: system.pcf

Loading device database for application Par from file "system_map.ncd".
   "system" is an NCD, version 2.38, device xc3s400, package ft256, speed -4
Loading device for application Par from file '3s400.nph' in environment
C:/Xilinx.
Device speed data version:  PRODUCTION 1.35 2004-11-11.


Resolving physical constraints.
Finished resolving physical constraints.

Device utilization summary:

   Number of External IOBs            85 out of 173    49%
      Number of LOCed External IOBs   85 out of 85    100%

   Number of MULT18X18s                3 out of 16     18%
   Number of RAMB16s                   8 out of 16     50%
   Number of Slices                 1595 out of 3584   44%
      Number of SLICEMs              321 out of 1792   17%

   Number of BSCANs                    1 out of 1     100%
   Number of BUFGMUXs                  2 out of 8      25%



Overall effort level (-ol):   Standard (set by user)
Placer effort level (-pl):    Standard (set by user)
Placer cost table entry (-t): 1
Router effort level (-rl):    Standard (set by user)

Starting initial Timing Analysis.  REAL time: 2 secs 
Finished initial Timing Analysis.  REAL time: 5 secs 


Phase 1.1
Phase 1.1 (Checksum:98e0bd) REAL time: 6 secs 
.
Phase 3.8
......................
...................
.....
Phase 3.8 (Checksum:bc94ab) REAL time: 13 secs 

Phase 4.5
Phase 4.5 (Checksum:26259fc) REAL time: 13 secs 

Phase 5.18
Phase 5.18 (Checksum:2faf07b) REAL time: 20 secs 
Writing design to file system.ncd.

Total REAL time to Placer completion: 22 secs 
Total CPU time to Placer completion: 20 secs 


Phase 1: 12500 unrouted;       REAL time: 22 secs 
Phase 2: 10838 unrouted;       REAL time: 24 secs 
Phase 3: 4951 unrouted;       REAL time: 27 secs 
Phase 4: 4951 unrouted; (0)      REAL time: 28 secs 

Phase 5: 4951 unrouted; (0)      REAL time: 29 secs 
Phase 6: 4951 unrouted; (0)      REAL time: 30 secs 
Phase 7: 0 unrouted; (0)      REAL time: 1 mins 6 secs 

Total REAL time to Router completion: 1 mins 8 secs 
Total CPU time to Router completion: 1 mins 7 secs 

Generating "par" statistics.

**************************
Generating Clock Report
**************************

+-------------------------+----------+------+------+------------+-------------+
|        Clock Net        | Resource |Locked|Fanout|Net Skew(ns)|Max Delay(ns)|
+-------------------------+----------+------+------+------------+-------------+
|         DBG_CLK_s       |  BUFGMUX7| No   |  140 |  0.020     |  1.034      |
+-------------------------+----------+------+------+------------+-------------+
|dlmb_port_BRAM_Clk       |  BUFGMUX0| No   | 1108 |  0.060     |  1.074      |
+-------------------------+----------+------+------+------------+-------------+
|debug_module/bscan_updat |          |      |      |            |             |
|                       e |   Local  |      |    1 |  0.000     |  1.002      |
+-------------------------+----------+------+------+------------+-------------+
|opb_intc_0/opb_intc_0/IN |          |      |      |            |             |
|TC_CORE_I/INTR_DET_I/int |          |      |      |            |             |
|              errupts<0> |   Local  |      |    1 |  0.000     |  0.688      |
+-------------------------+----------+------+------+------------+-------------+
Timing Score: 0
Asterisk (*) preceding a constraint indicates it was not met.
   This may be due to a setup or hold violation.

--------------------------------------------------------------------------------
  Constraint                                | Requested  | Actual     | Logic 
                                            |            |            | Levels
--------------------------------------------------------------------------------
  NET "bufgp_71/IBUFG" PERIOD =  20 nS   HI | 20.000ns   | 19.993ns   | 20   
  GH 50.000000 %                            |            |            |      
--------------------------------------------------------------------------------


All constraints were met.
Generating Pad Report.

All signals are completely routed.

Total REAL time to PAR completion: 1 mins 13 secs 
Total CPU time to PAR completion: 1 mins 11 secs 

Peak Memory Usage:  112 MB

Placement: Completed - No errors found.
Routing: Completed - No errors found.
Timing: Completed - No errors found.

Writing design to file system.ncd.


PAR done.



#----------------------------------------------#
# Starting program post_par_trce
# trce -e 3 -xml system.twx system.ncd system.pcf 
#----------------------------------------------#
Release 6.3i - Trace G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.



Loading device database for application trce from file "system.ncd".
PM_SPEC -- Xilinx path component is <C:/EDK>
   "system" is an NCD, version 2.38, device xc3s400, package ft256, speed -4
Loading device for application trce from file '3s400.nph' in environment
C:/Xilinx.
--------------------------------------------------------------------------------
Release 6.3i Trace G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.

trce -e 3 -xml system.twx system.ncd system.pcf


Design file:              system.ncd
Physical constraint file: system.pcf
Device,speed:             xc3s400,-4 (PRODUCTION 1.35 2004-11-11)
Report level:             error report
--------------------------------------------------------------------------------

INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
   option. All paths that are not constrained will be reported in the
   unconstrained paths section(s) of the report.


Timing summary:
---------------

Timing errors: 0  Score: 0

Constraints cover 173551 paths, 0 nets, and 10891 connections

Design statistics:
   Minimum period:  19.993ns (Maximum frequency:  50.018MHz)


Analysis completed Thu Jul 28 13:35:52 2005
--------------------------------------------------------------------------------

Generating Report ...

Total time: 7 secs 


xflow done!
cd implementation; bitgen -w -f bitgen.ut system
Release 6.3i - Bitgen G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.

Loading device database for application Bitgen from file "system.ncd".
PM_SPEC -- Xilinx path component is <C:/EDK>
   "system" is an NCD, version 2.38, device xc3s400, package ft256, speed -4
Loading device for application Bitgen from file '3s400.nph' in environment
C:/Xilinx.
Opened constraints file system.pcf.

Thu Jul 28 13:35:54 2005
Running DRC.
WARNING:DesignRules:372 - Netcheck: Gated clock. Clock net
   opb_intc_0/opb_intc_0/INTC_CORE_I/INTR_DET_I/interrupts<0> is sourced by a
   combinatorial pin. This is not good design practice. Use the CE pin to
   control the loading of data into the flip-flop.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I31/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I29/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I27/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I25/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I23/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I21/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I19/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I17/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I15/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I13/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I11/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I9/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I7/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I5/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I3/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I1/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I31/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I29/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I27/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I25/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I23/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I21/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I19/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I17/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I15/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I13/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I11/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I9/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I7/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I5/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I3/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I1/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I30/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I28/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I26/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I24/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I22/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I20/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I18/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I16/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I14/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I12/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I10/r
   eg2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I8/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I6/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I4/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I2/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I0/re
   g2_Data_Low is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I30/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I28/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I26/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I24/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I22/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I20/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I18/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I16/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I14/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I12/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I10/r
   eg2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I8/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I6/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I4/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I2/re
   g2_Data_High is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze_0/microblaze_0/Data_Flow_I/Register_File_I/Register_File_Bit_I0/re
   g2_Data_High is configured, but output is not used.
DRC detected 0 errors and 65 warnings.
Creating bit map...
Saving bit stream in "system.bit".
Creating bit mask...
Saving mask bit stream in "system.msk".
Bitstream generation is complete.
*********************************************
Initializing BRAM contents of the bitstream
*********************************************
bitinit system.mhs  -pe microblaze_0 TestApp/executable.elf  \
-bt implementation/system.bit -o implementation/download.bit

bitinit version Xilinx EDK 6.3 Build EDK_Gmm.10
Copyright (c) Xilinx Inc. 2002.

Parsing MHS File system.mhs...
PM_SPEC -- Xilinx path component is <C:/EDK>
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_v20_v1_10_b/data/opb_v20_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v1_00_b/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_emc_v1_10_b/data/opb_emc_v2_1_0.tcl
...Done

Overriding IP level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
32 - overriding c_family value virtex2 to 
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to 
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:55 - overriding c_family value virtex2 to 
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:56 - overriding c_instance value microblaze to microblaze_0
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to 
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd:37
- overriding c_family value virtex2 to 
opb_gpio (push_buttons_3bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (leds_8bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (led_cathodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (led_anodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 

Performing IP level DRCs on properties...

Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/emc_common_v2_00_a/data/emc_common_v2_1_0.
tcl ...Done
Address Map for Processor microblaze_0
  (0x00000000-0x00001fff) dlmb_cntlr	dlmb
  (0x00000000-0x00001fff) ilmb_cntlr	ilmb
  (0x80200100-0x802001ff) opb_intc_0	mb_opb
  (0x80200200-0x802002ff) debug_module	mb_opb
  (0x80200300-0x802003ff) RS232	mb_opb
  (0x80200400-0x802005ff) SRAM_256Kx32	mb_opb
  (0x80200600-0x802007ff) Push_Buttons_3Bit	mb_opb
  (0x80200800-0x802009ff) LEDs_8Bit	mb_opb
  (0x80200a00-0x80200bff) LED_cathodes	mb_opb
  (0x80200c00-0x80200dff) LED_anodes	mb_opb
  (0x80202000-0x80203fff) opb_bram_if_cntlr_1	mb_opb
  (0x80300000-0x803fffff) SRAM_256Kx32	mb_opb

Initializing Memory...
Checking ELFs associated with MICROBLAZE instance microblaze_0 for overlap...


Analyzing file TestApp/executable.elf...
Running Data2Mem with the following command:
data2mem -bm implementation/system_bd -bt implementation/system.bit  -bd
TestApp/executable.elf tag lmb_bram opb_bram_if_cntlr_1_bram  -o b
implementation/download.bit 
Memory Initialization completed successfully.

*********************************************
Downloading Bitstream onto the target board
*********************************************
impact -batch etc/download.cmd
PM_SPEC -- Xilinx path component is <C:/EDK>
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setCable -port auto
AutoDetecting cable. Please wait.
Connecting to cable (USB Port).
Cable connection failed.
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2. LPT base address = 0278h.
 ECP base address = FFFFFFFFh.
Cable connection established.
// *** BATCH CMD : identify
Identifying chain contents ....Version is 0000
'1': : Manufacturer's ID =Xilinx xcf02s, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/xcf/data/xcf02s.bsd...
INFO:iMPACT:501 - '1': Added Device xcf02s successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
Version is 0000
'2': : Manufacturer's ID =Xilinx xc3s400, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s400.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
Elapsed time =      2 sec.
// *** BATCH CMD : identifyMPM
Elapsed time =      0 sec.
// *** BATCH CMD : setAttribute -position 1 -attr configFileName -value
"implementation/download.bit"
'1': Loading file 'implementation/download.bit' ...
done.
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
// *** BATCH CMD : program -p 1 
Validating chain...
Boundary-scan chain validated successfully.
'1':Programming  device...
'1': Reading status register contents...
INFO:iMPACT:2146 - Status register values:
INFO:iMPACT - 0011 0111 0001 1000 0000 0000 0000 0000 
done.
INFO:iMPACT:579 - '1': Completed downloading bit file to device.
INFO:iMPACT:580 - '1':Checking done pin ....done.
'1': Programmed successfully.
Elapsed time =      8 sec.
----------------------------------------------------------------------
----------------------------------------------------------------------
Done.
At GMT date and time: 2005:7:28:5:36:59
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
make: Nothing to be done for `program'.
Done.
At GMT date and time: 2005:7:28:5:37:5
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make init_bram; exit;" Started...
make: Nothing to be done for `init_bram'.
Done.
At GMT date and time: 2005:7:28:5:37:9
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make download; exit;" Started...

*********************************************
Downloading Bitstream onto the target board
*********************************************
impact -batch etc/download.cmd
PM_SPEC -- Xilinx path component is <C:/EDK>
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setCable -port auto
AutoDetecting cable. Please wait.
Connecting to cable (USB Port).
Cable connection failed.
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2. LPT base address = 0278h.
 ECP base address = FFFFFFFFh.
Cable connection established.
// *** BATCH CMD : identify
Identifying chain contents ....Version is 0000
'1': : Manufacturer's ID =Xilinx xcf02s, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/xcf/data/xcf02s.bsd...
INFO:iMPACT:501 - '1': Added Device xcf02s successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
Version is 0000
'2': : Manufacturer's ID =Xilinx xc3s400, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s400.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
Elapsed time =      1 sec.
// *** BATCH CMD : identifyMPM
Elapsed time =      0 sec.
// *** BATCH CMD : setAttribute -position 1 -attr configFileName -value
"implementation/download.bit"
'1': Loading file 'implementation/download.bit' ...
done.
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
// *** BATCH CMD : program -p 1 
Validating chain...
Boundary-scan chain validated successfully.
'1':Programming  device...
'1': Reading status register contents...
INFO:iMPACT:2146 - Status register values:
INFO:iMPACT - 0011 0111 0001 1000 0000 0000 0000 0000 
done.
INFO:iMPACT:579 - '1': Completed downloading bit file to device.
INFO:iMPACT:580 - '1':Checking done pin ....done.
'1': Programmed successfully.
Elapsed time =      8 sec.
----------------------------------------------------------------------
----------------------------------------------------------------------
Done.
At GMT date and time: 2005:7:28:5:38:58
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make download; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
mb-size TestApp/executable.elf 
   text	   data	    bss	    dec	    hex	filename
   1264	     68	      4	   1336	    538	TestApp/executable.elf
*********************************************
Initializing BRAM contents of the bitstream
*********************************************
bitinit system.mhs  -pe microblaze_0 TestApp/executable.elf  \
-bt implementation/system.bit -o implementation/download.bit

bitinit version Xilinx EDK 6.3 Build EDK_Gmm.10
Copyright (c) Xilinx Inc. 2002.

Parsing MHS File system.mhs...
PM_SPEC -- Xilinx path component is <C:/EDK>
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_v20_v1_10_b/data/opb_v20_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v1_00_b/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_emc_v1_10_b/data/opb_emc_v2_1_0.tcl
...Done

Overriding IP level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
32 - overriding c_family value virtex2 to 
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to 
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:55 - overriding c_family value virtex2 to 
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:56 - overriding c_instance value microblaze to microblaze_0
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to 
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd:37
- overriding c_family value virtex2 to 
opb_gpio (push_buttons_3bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (leds_8bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (led_cathodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (led_anodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 

Performing IP level DRCs on properties...

Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/emc_common_v2_00_a/data/emc_common_v2_1_0.
tcl ...Done
Address Map for Processor microblaze_0
  (0x00000000-0x00001fff) dlmb_cntlr	dlmb
  (0x00000000-0x00001fff) ilmb_cntlr	ilmb
  (0x80200100-0x802001ff) opb_intc_0	mb_opb
  (0x80200200-0x802002ff) debug_module	mb_opb
  (0x80200300-0x802003ff) RS232	mb_opb
  (0x80200400-0x802005ff) SRAM_256Kx32	mb_opb
  (0x80200600-0x802007ff) Push_Buttons_3Bit	mb_opb
  (0x80200800-0x802009ff) LEDs_8Bit	mb_opb
  (0x80200a00-0x80200bff) LED_cathodes	mb_opb
  (0x80200c00-0x80200dff) LED_anodes	mb_opb
  (0x80202000-0x80203fff) opb_bram_if_cntlr_1	mb_opb
  (0x80300000-0x803fffff) SRAM_256Kx32	mb_opb

Initializing Memory...
Checking ELFs associated with MICROBLAZE instance microblaze_0 for overlap...


Analyzing file TestApp/executable.elf...
Running Data2Mem with the following command:
data2mem -bm implementation/system_bd -bt implementation/system.bit  -bd
TestApp/executable.elf tag lmb_bram opb_bram_if_cntlr_1_bram  -o b
implementation/download.bit 
Memory Initialization completed successfully.

*********************************************
Downloading Bitstream onto the target board
*********************************************
impact -batch etc/download.cmd
PM_SPEC -- Xilinx path component is <C:/EDK>
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setCable -port auto
AutoDetecting cable. Please wait.
Connecting to cable (USB Port).
Cable connection failed.
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2. LPT base address = 0278h.
 ECP base address = FFFFFFFFh.
Cable connection established.
// *** BATCH CMD : identify
Identifying chain contents ....Version is 0000
'1': : Manufacturer's ID =Xilinx xcf02s, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/xcf/data/xcf02s.bsd...
INFO:iMPACT:501 - '1': Added Device xcf02s successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
Version is 0000
'2': : Manufacturer's ID =Xilinx xc3s400, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s400.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
Elapsed time =      1 sec.
// *** BATCH CMD : identifyMPM
Elapsed time =      0 sec.
// *** BATCH CMD : setAttribute -position 1 -attr configFileName -value
"implementation/download.bit"
'1': Loading file 'implementation/download.bit' ...
done.
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
// *** BATCH CMD : program -p 1 
Validating chain...
Boundary-scan chain validated successfully.
'1':Programming  device...
'1': Reading status register contents...
INFO:iMPACT:2146 - Status register values:
INFO:iMPACT - 0011 0111 0001 1000 0000 0000 0000 0000 
done.
INFO:iMPACT:579 - '1': Completed downloading bit file to device.
INFO:iMPACT:580 - '1':Checking done pin ....done.
'1': Programmed successfully.
Elapsed time =      7 sec.
----------------------------------------------------------------------
----------------------------------------------------------------------
Done.
At GMT date and time: 2005:7:28:5:40:25
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make program; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
mb-size TestApp/executable.elf 
   text	   data	    bss	    dec	    hex	filename
   1264	     72	      4	   1340	    53c	TestApp/executable.elf
Done.
At GMT date and time: 2005:7:28:5:42:32
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make download; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
mb-size TestApp/executable.elf 
   text	   data	    bss	    dec	    hex	filename
   1280	     72	      4	   1356	    54c	TestApp/executable.elf
*********************************************
Initializing BRAM contents of the bitstream
*********************************************
bitinit system.mhs  -pe microblaze_0 TestApp/executable.elf  \
-bt implementation/system.bit -o implementation/download.bit

bitinit version Xilinx EDK 6.3 Build EDK_Gmm.10
Copyright (c) Xilinx Inc. 2002.

Parsing MHS File system.mhs...
PM_SPEC -- Xilinx path component is <C:/EDK>
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_v20_v1_10_b/data/opb_v20_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v1_00_b/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_emc_v1_10_b/data/opb_emc_v2_1_0.tcl
...Done

Overriding IP level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
32 - overriding c_family value virtex2 to 
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to 
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:55 - overriding c_family value virtex2 to 
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:56 - overriding c_instance value microblaze to microblaze_0
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to 
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd:37
- overriding c_family value virtex2 to 
opb_gpio (push_buttons_3bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (leds_8bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (led_cathodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (led_anodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 

Performing IP level DRCs on properties...

Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/emc_common_v2_00_a/data/emc_common_v2_1_0.
tcl ...Done
Address Map for Processor microblaze_0
  (0x00000000-0x00001fff) dlmb_cntlr	dlmb
  (0x00000000-0x00001fff) ilmb_cntlr	ilmb
  (0x80200100-0x802001ff) opb_intc_0	mb_opb
  (0x80200200-0x802002ff) debug_module	mb_opb
  (0x80200300-0x802003ff) RS232	mb_opb
  (0x80200400-0x802005ff) SRAM_256Kx32	mb_opb
  (0x80200600-0x802007ff) Push_Buttons_3Bit	mb_opb
  (0x80200800-0x802009ff) LEDs_8Bit	mb_opb
  (0x80200a00-0x80200bff) LED_cathodes	mb_opb
  (0x80200c00-0x80200dff) LED_anodes	mb_opb
  (0x80202000-0x80203fff) opb_bram_if_cntlr_1	mb_opb
  (0x80300000-0x803fffff) SRAM_256Kx32	mb_opb

Initializing Memory...
Checking ELFs associated with MICROBLAZE instance microblaze_0 for overlap...


Analyzing file TestApp/executable.elf...
Running Data2Mem with the following command:
data2mem -bm implementation/system_bd -bt implementation/system.bit  -bd
TestApp/executable.elf tag lmb_bram opb_bram_if_cntlr_1_bram  -o b
implementation/download.bit 
Memory Initialization completed successfully.


*********************************************
Downloading Bitstream onto the target board
*********************************************
impact -batch etc/download.cmd
PM_SPEC -- Xilinx path component is <C:/EDK>
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setCable -port auto
AutoDetecting cable. Please wait.
Connecting to cable (USB Port).
Cable connection failed.
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2. LPT base address = 0278h.
 ECP base address = FFFFFFFFh.
Cable connection established.
// *** BATCH CMD : identify
Identifying chain contents ....Version is 0000
'1': : Manufacturer's ID =Xilinx xcf02s, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/xcf/data/xcf02s.bsd...
INFO:iMPACT:501 - '1': Added Device xcf02s successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
Version is 0000
'2': : Manufacturer's ID =Xilinx xc3s400, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s400.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
Elapsed time =      1 sec.
// *** BATCH CMD : identifyMPM
Elapsed time =      0 sec.
// *** BATCH CMD : setAttribute -position 1 -attr configFileName -value
"implementation/download.bit"
'1': Loading file 'implementation/download.bit' ...
done.
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
// *** BATCH CMD : program -p 1 
Validating chain...
Boundary-scan chain validated successfully.
'1':Programming  device...
'1': Reading status register contents...
INFO:iMPACT:2146 - Status register values:
INFO:iMPACT - 0011 0111 0001 1000 0000 0000 0000 0000 
done.
INFO:iMPACT:579 - '1': Completed downloading bit file to device.
INFO:iMPACT:580 - '1':Checking done pin ....done.
'1': Programmed successfully.
Elapsed time =      8 sec.
----------------------------------------------------------------------
----------------------------------------------------------------------
Done.
At GMT date and time: 2005:7:28:5:43:29
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make download; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
mb-size TestApp/executable.elf 
   text	   data	    bss	    dec	    hex	filename
   1304	     72	      4	   1380	    564	TestApp/executable.elf
*********************************************
Initializing BRAM contents of the bitstream
*********************************************
bitinit system.mhs  -pe microblaze_0 TestApp/executable.elf  \
-bt implementation/system.bit -o implementation/download.bit

bitinit version Xilinx EDK 6.3 Build EDK_Gmm.10
Copyright (c) Xilinx Inc. 2002.

Parsing MHS File system.mhs...
PM_SPEC -- Xilinx path component is <C:/EDK>
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_v20_v1_10_b/data/opb_v20_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v1_00_b/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_emc_v1_10_b/data/opb_emc_v2_1_0.tcl
...Done

Overriding IP level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
32 - overriding c_family value virtex2 to 
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to 
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:55 - overriding c_family value virtex2 to 
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:56 - overriding c_instance value microblaze to microblaze_0
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to 
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd:37
- overriding c_family value virtex2 to 
opb_gpio (push_buttons_3bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (leds_8bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (led_cathodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (led_anodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 

Performing IP level DRCs on properties...

Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/emc_common_v2_00_a/data/emc_common_v2_1_0.
tcl ...Done
Address Map for Processor microblaze_0
  (0x00000000-0x00001fff) dlmb_cntlr	dlmb
  (0x00000000-0x00001fff) ilmb_cntlr	ilmb
  (0x80200100-0x802001ff) opb_intc_0	mb_opb
  (0x80200200-0x802002ff) debug_module	mb_opb
  (0x80200300-0x802003ff) RS232	mb_opb
  (0x80200400-0x802005ff) SRAM_256Kx32	mb_opb
  (0x80200600-0x802007ff) Push_Buttons_3Bit	mb_opb
  (0x80200800-0x802009ff) LEDs_8Bit	mb_opb
  (0x80200a00-0x80200bff) LED_cathodes	mb_opb
  (0x80200c00-0x80200dff) LED_anodes	mb_opb
  (0x80202000-0x80203fff) opb_bram_if_cntlr_1	mb_opb
  (0x80300000-0x803fffff) SRAM_256Kx32	mb_opb

Initializing Memory...
Checking ELFs associated with MICROBLAZE instance microblaze_0 for overlap...


Analyzing file TestApp/executable.elf...
Running Data2Mem with the following command:
data2mem -bm implementation/system_bd -bt implementation/system.bit  -bd
TestApp/executable.elf tag lmb_bram opb_bram_if_cntlr_1_bram  -o b
implementation/download.bit 
Memory Initialization completed successfully.


*********************************************
Downloading Bitstream onto the target board
*********************************************
impact -batch etc/download.cmd
PM_SPEC -- Xilinx path component is <C:/EDK>
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setCable -port auto
AutoDetecting cable. Please wait.
Connecting to cable (USB Port).
Cable connection failed.
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2. LPT base address = 0278h.
 ECP base address = FFFFFFFFh.
Cable connection established.
// *** BATCH CMD : identify
Identifying chain contents ....Version is 0000
'1': : Manufacturer's ID =Xilinx xcf02s, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/xcf/data/xcf02s.bsd...
INFO:iMPACT:501 - '1': Added Device xcf02s successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
Version is 0000
'2': : Manufacturer's ID =Xilinx xc3s400, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s400.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
Elapsed time =      1 sec.
// *** BATCH CMD : identifyMPM
Elapsed time =      0 sec.
// *** BATCH CMD : setAttribute -position 1 -attr configFileName -value
"implementation/download.bit"
'1': Loading file 'implementation/download.bit' ...
done.
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
// *** BATCH CMD : program -p 1 
Validating chain...
Boundary-scan chain validated successfully.
'1':Programming  device...
'1': Reading status register contents...
INFO:iMPACT:2146 - Status register values:
INFO:iMPACT - 0011 0111 0001 1000 0000 0000 0000 0000 
done.
INFO:iMPACT:579 - '1': Completed downloading bit file to device.
INFO:iMPACT:580 - '1':Checking done pin ....done.
'1': Programmed successfully.
Elapsed time =      8 sec.
----------------------------------------------------------------------
----------------------------------------------------------------------
Done.
At GMT date and time: 2005:7:28:5:43:56
Command bash -c "cd /xygdrive/c/edk_user_repository/lab1/; /usr/bin/make -f system.make download; exit;" Started...
mb-gcc -O2 TestApp/src/TestApp.c  -o TestApp/executable.elf \
   -mno-xl-soft-mul     -Wl,-T -Wl,TestApp/src/TestAppLinkScr  -g    -I./microblaze_0/include/  -L./microblaze_0/lib/  \
-xl-mode-executable  \
  
mb-size TestApp/executable.elf 
   text	   data	    bss	    dec	    hex	filename
   1308	     72	      4	   1384	    568	TestApp/executable.elf
*********************************************
Initializing BRAM contents of the bitstream
*********************************************
bitinit system.mhs  -pe microblaze_0 TestApp/executable.elf  \
-bt implementation/system.bit -o implementation/download.bit

bitinit version Xilinx EDK 6.3 Build EDK_Gmm.10
Copyright (c) Xilinx Inc. 2002.

Parsing MHS File system.mhs...
PM_SPEC -- Xilinx path component is <C:/EDK>
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_v20_v1_10_b/data/opb_v20_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v1_00_b/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...Done
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_emc_v1_10_b/data/opb_emc_v2_1_0.tcl
...Done

Overriding IP level properties ...
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd:
32 - overriding c_family value virtex2 to 
bram_block (opb_bram_if_cntlr_1_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to 
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:55 - overriding c_family value virtex2 to 
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v3_00_a\data\microblaze_v2_1_0.
mpd:56 - overriding c_instance value microblaze to microblaze_0
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd:38 - overriding c_family value virtex2 to 
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd:37
- overriding c_family value virtex2 to 
opb_gpio (push_buttons_3bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (leds_8bit) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (led_cathodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 
opb_gpio (led_anodes) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_a\data\opb_gpio_v2_1_0.mpd:
37 - overriding c_family value virtex2 to 

Performing IP level DRCs on properties...

Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/emc_common_v2_00_a/data/emc_common_v2_1_0.
tcl ...Done
Address Map for Processor microblaze_0
  (0x00000000-0x00001fff) dlmb_cntlr	dlmb
  (0x00000000-0x00001fff) ilmb_cntlr	ilmb
  (0x80200100-0x802001ff) opb_intc_0	mb_opb
  (0x80200200-0x802002ff) debug_module	mb_opb
  (0x80200300-0x802003ff) RS232	mb_opb
  (0x80200400-0x802005ff) SRAM_256Kx32	mb_opb
  (0x80200600-0x802007ff) Push_Buttons_3Bit	mb_opb
  (0x80200800-0x802009ff) LEDs_8Bit	mb_opb
  (0x80200a00-0x80200bff) LED_cathodes	mb_opb
  (0x80200c00-0x80200dff) LED_anodes	mb_opb
  (0x80202000-0x80203fff) opb_bram_if_cntlr_1	mb_opb
  (0x80300000-0x803fffff) SRAM_256Kx32	mb_opb

Initializing Memory...
Checking ELFs associated with MICROBLAZE instance microblaze_0 for overlap...


Analyzing file TestApp/executable.elf...
Running Data2Mem with the following command:
data2mem -bm implementation/system_bd -bt implementation/system.bit  -bd
TestApp/executable.elf tag lmb_bram opb_bram_if_cntlr_1_bram  -o b
implementation/download.bit 
Memory Initialization completed successfully.


*********************************************
Downloading Bitstream onto the target board
*********************************************
impact -batch etc/download.cmd
PM_SPEC -- Xilinx path component is <C:/EDK>
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setCable -port auto
AutoDetecting cable. Please wait.
Connecting to cable (USB Port).
Cable connection failed.
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
 Driver windrvr6.sys version = 6.2.2.2. LPT base address = 0278h.
 ECP base address = FFFFFFFFh.
Cable connection established.
// *** BATCH CMD : identify
Identifying chain contents ....Version is 0000
'1': : Manufacturer's ID =Xilinx xcf02s, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/xcf/data/xcf02s.bsd...
INFO:iMPACT:501 - '1': Added Device xcf02s successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
Version is 0000
'2': : Manufacturer's ID =Xilinx xc3s400, Version : 0
INFO:iMPACT:1777 - 
   Reading C:/Xilinx/spartan3/data/xc3s400.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
Elapsed time =      1 sec.
// *** BATCH CMD : identifyMPM
Elapsed time =      0 sec.
// *** BATCH CMD : setAttribute -position 1 -attr configFileName -value
"implementation/download.bit"
'1': Loading file 'implementation/download.bit' ...
done.
INFO:iMPACT:501 - '1': Added Device xc3s400 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
----------------------------------------------------------------------
// *** BATCH CMD : program -p 1 
Validating chain...
Boundary-scan chain validated successfully.
'1':Programming  device...
'1': Reading status register contents...
INFO:iMPACT:2146 - Status register values:
INFO:iMPACT - 0011 0111 0001 1000 0000 0000 0000 0000 
done.
INFO:iMPACT:579 - '1': Completed downloading bit file to device.
INFO:iMPACT:580 - '1':Checking done pin ....done.
'1': Programmed successfully.
Elapsed time =      7 sec.
----------------------------------------------------------------------
----------------------------------------------------------------------
Done.
