
/*******************************************************************
*
* CAUTION: This file is automatically generated by libgen.
* Version: Xilinx EDK 6.3 EDK_Gmm.10
* DO NOT EDIT.
*
* Copyright (c) 2004 Xilinx, Inc.  All rights reserved. 
* 
* Description: Driver parameters
*
*******************************************************************/

#define STDIN_BASEADDRESS 0x80200300
#define STDOUT_BASEADDRESS 0x80200300

/******************************************************************/

#define XPAR_DLMB_CNTLR_BASEADDR 0x00000000
#define XPAR_DLMB_CNTLR_HIGHADDR 0x00001FFF
#define XPAR_ILMB_CNTLR_BASEADDR 0x00000000
#define XPAR_ILMB_CNTLR_HIGHADDR 0x00001FFF
#define XPAR_OPB_BRAM_IF_CNTLR_1_BASEADDR 0x80202000
#define XPAR_OPB_BRAM_IF_CNTLR_1_HIGHADDR 0x80203FFF

/******************************************************************/

#define XPAR_INTC_MAX_NUM_INTR_INPUTS 1
#define XPAR_XINTC_HAS_IPR 1
#define XPAR_XINTC_USE_DCR 0
#define XPAR_XINTC_NUM_INSTANCES 1
#define XPAR_OPB_INTC_0_BASEADDR 0x80200100
#define XPAR_OPB_INTC_0_HIGHADDR 0x802001FF
#define XPAR_OPB_INTC_0_DEVICE_ID 0
#define XPAR_OPB_INTC_0_KIND_OF_INTR 0x00000001

/******************************************************************/

#define XPAR_INTC_SINGLE_BASEADDR 0x80200100
#define XPAR_INTC_SINGLE_HIGHADDR 0x802001FF
#define XPAR_INTC_SINGLE_DEVICE_ID XPAR_OPB_INTC_0_DEVICE_ID
#define XPAR_RS232_INTERRUPT_MASK 0X000001
#define XPAR_OPB_INTC_0_RS232_INTERRUPT_INTR 0

/******************************************************************/

#define XPAR_XUARTLITE_NUM_INSTANCES 2
#define XPAR_DEBUG_MODULE_BASEADDR 0x80200200
#define XPAR_DEBUG_MODULE_HIGHADDR 0x802002FF
#define XPAR_DEBUG_MODULE_DEVICE_ID 0
#define XPAR_DEBUG_MODULE_BAUDRATE 0
#define XPAR_DEBUG_MODULE_USE_PARITY 0
#define XPAR_DEBUG_MODULE_ODD_PARITY 0
#define XPAR_DEBUG_MODULE_DATA_BITS 0
#define XPAR_RS232_BASEADDR 0x80200300
#define XPAR_RS232_HIGHADDR 0x802003FF
#define XPAR_RS232_DEVICE_ID 1
#define XPAR_RS232_BAUDRATE 9600
#define XPAR_RS232_USE_PARITY 0
#define XPAR_RS232_ODD_PARITY 0
#define XPAR_RS232_DATA_BITS 8

/******************************************************************/

#define XPAR_VGA_BASEADDR 0xFEFF1000
#define XPAR_VGA_HIGHADDR 0xFEFF1FFF

/******************************************************************/

#define XPAR_XEMC_NUM_INSTANCES 1
#define XPAR_SRAM_256KX32_BASEADDR 0x80200400
#define XPAR_SRAM_256KX32_HIGHADDR 0x802005FF
#define XPAR_SRAM_256KX32_DEVICE_ID 0
#define XPAR_SRAM_256KX32_NUM_BANKS_MEM 1

/******************************************************************/

#define XPAR_SRAM_256KX32_MEM0_BASEADDR 0x80300000
#define XPAR_SRAM_256KX32_MEM0_HIGHADDR 0x803FFFFF

/******************************************************************/

#define XPAR_XGPIO_NUM_INSTANCES 4
#define XPAR_PUSH_BUTTONS_3BIT_BASEADDR 0x80200600
#define XPAR_PUSH_BUTTONS_3BIT_HIGHADDR 0x802007FF
#define XPAR_PUSH_BUTTONS_3BIT_DEVICE_ID 0
#define XPAR_PUSH_BUTTONS_3BIT_INTERRUPT_PRESENT 0
#define XPAR_PUSH_BUTTONS_3BIT_IS_DUAL 0
#define XPAR_LEDS_8BIT_BASEADDR 0x80200800
#define XPAR_LEDS_8BIT_HIGHADDR 0x802009FF
#define XPAR_LEDS_8BIT_DEVICE_ID 1
#define XPAR_LEDS_8BIT_INTERRUPT_PRESENT 0
#define XPAR_LEDS_8BIT_IS_DUAL 0
#define XPAR_LED_CATHODES_BASEADDR 0x80200A00
#define XPAR_LED_CATHODES_HIGHADDR 0x80200BFF
#define XPAR_LED_CATHODES_DEVICE_ID 2
#define XPAR_LED_CATHODES_INTERRUPT_PRESENT 0
#define XPAR_LED_CATHODES_IS_DUAL 0
#define XPAR_LED_ANODES_BASEADDR 0x80200C00
#define XPAR_LED_ANODES_HIGHADDR 0x80200DFF
#define XPAR_LED_ANODES_DEVICE_ID 3
#define XPAR_LED_ANODES_INTERRUPT_PRESENT 0
#define XPAR_LED_ANODES_IS_DUAL 0

/******************************************************************/

