# ##############################################################################
# Created by Base System Builder Wizard for Xilinx EDK 6.3 Build EDK_Gmm.9
# Wed Aug 25 14:10:03 2004
# Target Board:  Xilinx Spartan-3 Starter Board Rev E
# Family:	 spartan3
# Device:	 XC3S200
# Package:	 FT256
# Speed Grade:	 -4
# Processor: Microblaze
# System clock frequency: 50.000000 MHz
# Debug interface: On-Chip HW Debug Module
# Data Cache: 8 KB
# Instruction Cache: 8 KB
# On Chip Memory :  16 KB
# Total Off Chip Memory :   1 MB
# - SRAM_256Kx32 =   1 MB
# ##############################################################################


 PARAMETER VERSION = 2.1.0


 PORT fpga_0_RS232_RX_pin = fpga_0_RS232_RX, DIR = IN
 PORT fpga_0_RS232_TX_pin = fpga_0_RS232_TX, DIR = OUT
 PORT fpga_0_LEDs_8Bit_GPIO_d_out_pin = fpga_0_LEDs_8Bit_GPIO_d_out, VEC = [0:7], DIR = OUT
 PORT fpga_0_Push_Buttons_3Bit_GPIO_in_pin = fpga_0_Push_Buttons_3Bit_GPIO_in, VEC = [0:2], DIR = IN
 PORT fpga_0_SRAM_256Kx32_Mem_A_pin = fpga_0_SRAM_256Kx32_Mem_A, VEC = [12:29], DIR = OUT
 PORT fpga_0_SRAM_256Kx32_Mem_DQ_pin = fpga_0_SRAM_256Kx32_Mem_DQ, VEC = [0:31], DIR = INOUT
 PORT fpga_0_SRAM_256Kx32_Mem_OEN_pin = fpga_0_SRAM_256Kx32_Mem_OEN, VEC = [0:0], DIR = OUT
 PORT fpga_0_SRAM_256Kx32_Mem_CEN_pin = fpga_0_SRAM_256Kx32_Mem_CEN, VEC = [0:0], DIR = OUT
 PORT fpga_0_SRAM_256Kx32_Mem_CEN_1_pin = fpga_0_SRAM_256Kx32_Mem_CEN, VEC = [0:0], DIR = OUT
 PORT fpga_0_SRAM_256Kx32_Mem_WEN_pin = fpga_0_SRAM_256Kx32_Mem_WEN, DIR = OUT
 PORT fpga_0_SRAM_256Kx32_Mem_BEN_pin = fpga_0_SRAM_256Kx32_Mem_BEN, VEC = [0:3], DIR = OUT
 PORT sys_clk_pin = sys_clk_s, DIR = IN, SIGIS = CLK
 PORT sys_rst_pin = sys_rst_s, DIR = IN
 PORT cathode = fpga_0_LED_cathode_GPIO_d_out, VEC = [0:7], DIR = OUT
 PORT anode = fpga_0_LED_anode_GPIO_d_out, VEC = [0:3], DIR = OUT
 PORT red = VIDOUT_RED, DIR = OUT
 PORT blue = VIDOUT_BLUE, DIR = OUT
 PORT green = VIDOUT_GREEN, DIR = OUT
 PORT hsync = VIDOUT_HSYNC, DIR = OUT
 PORT vsync = VIDOUT_VSYNC, DIR = OUT


BEGIN video_emc_controller
 PARAMETER INSTANCE = video_emc_controller_0
 PARAMETER C_BASEADDR = 0xb0000000
 PARAMETER C_HIGHADDR = 0xb0001fff
 PARAMETER C_MEM0_BASEADDR = 0xc0000000
 PARAMETER C_MEM0_HIGHADDR = 0xffffffff
 BUS_INTERFACE SOPB = mb_opb
 PORT Mem_A = fpga_0_SRAM_256Kx32_Mem_A_split
 PORT Mem_DQ = fpga_0_SRAM_256Kx32_Mem_DQ
 PORT Mem_OEN = fpga_0_SRAM_256Kx32_Mem_OEN
 PORT Mem_CEN = fpga_0_SRAM_256Kx32_Mem_CEN
 PORT Mem_WEN = fpga_0_SRAM_256Kx32_Mem_WEN
 PORT Mem_BEN = fpga_0_SRAM_256Kx32_Mem_BEN
 PORT VIDOUT_RED = VIDOUT_RED
 PORT VIDOUT_GREEN = VIDOUT_GREEN
 PORT VIDOUT_BLUE = VIDOUT_BLUE
 PORT VIDOUT_HSYNC = VIDOUT_HSYNC
 PORT VIDOUT_VSYNC = VIDOUT_VSYNC
 PORT OPB_Clk = sys_clk_s
 PORT Pixel_Clock_2x = sys_clk_s
END

BEGIN opb_intc
 PARAMETER INSTANCE = opb_intc_0
 PARAMETER HW_VER = 1.00.c
 PARAMETER C_BASEADDR = 0x80200100
 PARAMETER C_HIGHADDR = 0x802001ff
 BUS_INTERFACE SOPB = mb_opb
 PORT Irq = Interrupt
 PORT Intr = RS232_Interrupt
END

BEGIN bram_block
 PARAMETER INSTANCE = opb_bram_if_cntlr_1_bram
 PARAMETER HW_VER = 1.00.a
 BUS_INTERFACE PORTA = opb_bram_if_cntlr_1_port
END

BEGIN opb_bram_if_cntlr
 PARAMETER INSTANCE = opb_bram_if_cntlr_1
 PARAMETER HW_VER = 1.00.a
 PARAMETER c_opb_clk_period_ps = 20000
 PARAMETER c_baseaddr = 0x80202000
 PARAMETER c_highaddr = 0x80203fff
 BUS_INTERFACE SOPB = mb_opb
 BUS_INTERFACE PORTA = opb_bram_if_cntlr_1_port
 PORT OPB_Clk = sys_clk_s
END

BEGIN microblaze
 PARAMETER INSTANCE = microblaze_0
 PARAMETER HW_VER = 3.00.a
 PARAMETER C_DEBUG_ENABLED = 1
 PARAMETER C_NUMBER_OF_PC_BRK = 2
 PARAMETER C_NUMBER_OF_RD_ADDR_BRK = 1
 PARAMETER C_NUMBER_OF_WR_ADDR_BRK = 1
 BUS_INTERFACE DLMB = dlmb
 BUS_INTERFACE ILMB = ilmb
 BUS_INTERFACE DOPB = mb_opb
 BUS_INTERFACE IOPB = mb_opb
 PORT CLK = sys_clk_s
 PORT DBG_CAPTURE = DBG_CAPTURE_s
 PORT DBG_CLK = DBG_CLK_s
 PORT DBG_REG_EN = DBG_REG_EN_s
 PORT DBG_TDI = DBG_TDI_s
 PORT DBG_TDO = DBG_TDO_s
 PORT DBG_UPDATE = DBG_UPDATE_s
 PORT Interrupt = Interrupt
END

BEGIN opb_v20
 PARAMETER INSTANCE = mb_opb
 PARAMETER HW_VER = 1.10.b
 PARAMETER C_EXT_RESET_HIGH = 1
 PORT SYS_Rst = sys_rst_s
 PORT OPB_Clk = sys_clk_s
END

BEGIN bram_block
 PARAMETER INSTANCE = lmb_bram
 PARAMETER HW_VER = 1.00.a
 BUS_INTERFACE PORTA = ilmb_port
 BUS_INTERFACE PORTB = dlmb_port
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = ilmb_cntlr
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x00003fff
 BUS_INTERFACE SLMB = ilmb
 BUS_INTERFACE BRAM_PORT = ilmb_port
END

BEGIN lmb_v10
 PARAMETER INSTANCE = ilmb
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_EXT_RESET_HIGH = 1
 PORT SYS_Rst = sys_rst_s
 PORT LMB_Clk = sys_clk_s
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = dlmb_cntlr
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x00003fff
 BUS_INTERFACE SLMB = dlmb
 BUS_INTERFACE BRAM_PORT = dlmb_port
END

BEGIN lmb_v10
 PARAMETER INSTANCE = dlmb
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_EXT_RESET_HIGH = 1
 PORT SYS_Rst = sys_rst_s
 PORT LMB_Clk = sys_clk_s
END

BEGIN opb_mdm
 PARAMETER INSTANCE = debug_module
 PARAMETER HW_VER = 2.00.a
 PARAMETER C_MB_DBG_PORTS = 1
 PARAMETER C_USE_UART = 1
 PARAMETER C_UART_WIDTH = 8
 PARAMETER C_BASEADDR = 0x80200200
 PARAMETER C_HIGHADDR = 0x802002ff
 BUS_INTERFACE SOPB = mb_opb
 PORT OPB_Clk = sys_clk_s
 PORT DBG_CAPTURE_0 = DBG_CAPTURE_s
 PORT DBG_CLK_0 = DBG_CLK_s
 PORT DBG_REG_EN_0 = DBG_REG_EN_s
 PORT DBG_TDI_0 = DBG_TDI_s
 PORT DBG_TDO_0 = DBG_TDO_s
 PORT DBG_UPDATE_0 = DBG_UPDATE_s
END

BEGIN util_bus_split
 PARAMETER INSTANCE = SRAM_256Kx32_util_bus_split_0
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_SIZE_IN = 32
 PARAMETER C_LEFT_POS = 12
 PARAMETER C_SPLIT = 30
 PORT Sig = fpga_0_SRAM_256Kx32_Mem_A_split
 PORT Out1 = fpga_0_SRAM_256Kx32_Mem_A
END

BEGIN opb_uartlite
 PARAMETER INSTANCE = RS232
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_BAUDRATE = 19200
 PARAMETER C_DATA_BITS = 8
 PARAMETER C_ODD_PARITY = 0
 PARAMETER C_USE_PARITY = 0
 PARAMETER C_CLK_FREQ = 50000000
 PARAMETER C_BASEADDR = 0x80200300
 PARAMETER C_HIGHADDR = 0x802003ff
 BUS_INTERFACE SOPB = mb_opb
 PORT OPB_Clk = sys_clk_s
 PORT Interrupt = RS232_Interrupt
 PORT RX = fpga_0_RS232_RX
 PORT TX = fpga_0_RS232_TX
END

BEGIN opb_gpio
 PARAMETER INSTANCE = Push_Buttons_3Bit
 PARAMETER HW_VER = 3.01.a
 PARAMETER C_GPIO_WIDTH = 3
 PARAMETER C_IS_DUAL = 0
 PARAMETER C_IS_BIDIR = 0
 PARAMETER C_ALL_INPUTS = 1
 PARAMETER C_BASEADDR = 0x80200600
 PARAMETER C_HIGHADDR = 0x802007ff
 BUS_INTERFACE SOPB = mb_opb
 PORT OPB_Clk = sys_clk_s
 PORT GPIO_in = fpga_0_Push_Buttons_3Bit_GPIO_in
END

BEGIN opb_gpio
 PARAMETER INSTANCE = LEDs_8Bit
 PARAMETER HW_VER = 3.01.a
 PARAMETER C_GPIO_WIDTH = 8
 PARAMETER C_IS_DUAL = 0
 PARAMETER C_IS_BIDIR = 0
 PARAMETER C_ALL_INPUTS = 0
 PARAMETER C_BASEADDR = 0x80200800
 PARAMETER C_HIGHADDR = 0x802009ff
 BUS_INTERFACE SOPB = mb_opb
 PORT OPB_Clk = sys_clk_s
 PORT GPIO_d_out = fpga_0_LEDs_8Bit_GPIO_d_out
END

BEGIN opb_gpio
 PARAMETER INSTANCE = LED_cathodes
 PARAMETER HW_VER = 3.01.a
 PARAMETER C_BASEADDR = 0x80200a00
 PARAMETER C_HIGHADDR = 0x80200bff
 PARAMETER C_GPIO_WIDTH = 8
 PARAMETER C_ALL_INPUTS = 0
 PARAMETER C_IS_BIDIR = 0
 PARAMETER C_IS_DUAL = 0
 BUS_INTERFACE SOPB = mb_opb
 PORT OPB_Clk = sys_clk_s
 PORT GPIO_d_out = fpga_0_LED_cathode_GPIO_d_out
END

BEGIN opb_gpio
 PARAMETER INSTANCE = LED_anodes
 PARAMETER HW_VER = 3.01.a
 PARAMETER C_BASEADDR = 0x80200c00
 PARAMETER C_HIGHADDR = 0x80200dff
 PARAMETER C_GPIO_WIDTH = 4
 PARAMETER C_IS_DUAL = 0
 PARAMETER C_IS_BIDIR = 0
 PARAMETER C_ALL_INPUTS = 0
 BUS_INTERFACE SOPB = mb_opb
 PORT OPB_Clk = sys_clk_s
 PORT GPIO_d_out = fpga_0_LED_anode_GPIO_d_out
END

