library ieee;
use ieee.std_logic_1164.all;

-- entity
-------------------------------------------------------------------------------

entity OPB_XSBLEDs is  --USER-- change entity name
  generic
  (
    C_BASEADDR         : std_logic_vector(0 to 31) := X"FFFFFFFF";
    C_HIGHADDR         : std_logic_vector(0 to 31) := X"00000000";
    C_OPB_AWIDTH       : integer                   := 32;
    C_OPB_DWIDTH       : integer                   := 32
  );
  port
  (
    --Required OPB bus ports, do not add to or delete
    OPB_ABus     : in  std_logic_vector(0 to C_OPB_AWIDTH-1);
    OPB_BE       : in  std_logic_vector(0 to C_OPB_DWIDTH/8-1);
    OPB_Clk      : in  std_logic;
    OPB_DBus     : in  std_logic_vector(0 to C_OPB_DWIDTH-1);
    OPB_RNW      : in  std_logic;
    OPB_Rst      : in  std_logic;
    OPB_select   : in  std_logic;
    OPB_seqAddr  : in  std_logic;
    Sln_DBus     : out std_logic_vector(0 to C_OPB_DWIDTH-1);
    Sln_errAck   : out std_logic;
    Sln_retry    : out std_logic;
    Sln_toutSup  : out std_logic;
    Sln_xferAck  : out std_logic;

    --USER-- add user I/Os to port list
    RIGHT_LED    : out std_logic_vector(0 to 7);
    LEFT_LED     : out std_logic_vector(0 to 7);
    BAR_LED      : out std_logic_vector(0 to 9)
  );
end entity OPB_XSBLEDs; --USER-- change entity name

-------------------------------------------------------------------------------
-- architecture
-------------------------------------------------------------------------------

architecture imp of OPB_XSBLEDs is --USER-- change entity name

signal addr : std_logic_vector(0 to 1);  -- local address
signal wdata : std_logic_vector(0 to 7);
signal rnw : std_logic;
signal cs, xfer : std_logic;

begin

process (OPB_select, OPB_ABus)
begin

  if(OPB_select='1' and OPB_ABus(0 to 23)=C_BASEADDR(0 to 23)) then
    cs <= '1'; else
    cs <= '0';
  end if;
  
end process;
  
process (OPB_Clk)
begin
  if OPB_Clk'event and OPB_Clk = '1' then
    rnw <= OPB_RNW;    
    addr <= OPB_ABus(28 to 29);
    wdata <= OPB_DBus(0 to 7);
    xfer <= cs and not xfer;

    if(xfer='1' and rnw='0') then
    case addr is
      when "00" => RIGHT_LED <= wdata;
      when "01" => LEFT_LED <= wdata;
      when "10" => BAR_LED(0 to 7) <= wdata;
      when "11" => BAR_LED(8 to 9) <= wdata (0 to 1);
      when others => null;
    end case;
    end if;     
    
  end if;
end process;

Sln_xferAck <= xfer;

end architecture imp;

