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README for the project
Written for 128-bit AES decryption project
Course: CSEE 4840 - Embedded System Design, Spring 2008
Authors: 		Shrivathsa Bhargav (sb2784)
			Larry Chen (lc2454)
			Abhinandan Majumdar (am2993)
			Shiva Ramudit (syr9)

Last modified: 5-10-2008

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This is the README for the project as a whole. It aims to educate you, the
unwary user, about the project.

1. Purpose
2. Requirements
3. Compilation
4. Execution
5. Summary

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1. Purpose

The package consist of following folders/files with its functionality listed 
as follows.

FOLDER		PURPOSE
<>		The root folder houses the Quartus generated files, as well
		as the main Quartus project file. The simplest way to run the
		project is to point Quartus to this root folder and double-
		click the project file.
.sopc_builder	HIDDEN. This contains the SOPC-builder-generated system files.
		Normally, there should be no need to even access this folder,
		unless you choose to modify the system in any way. The only
		sane way to modify the system is through the SOPC builder.
aes_c_code	This is the C-code written to test out the AES algorithm
		before beginning the HDL implementation. It carries its own
		readme.
precompiled	This contains the bare minimum files required to get the
		project running without compilation. See the compilation
		section to figure out how to do this.
sample		Contains a small (<10 meg) encrypted video. It can be 
		written to an SD-card through the command:
			dd 
software	Contains the Nios C code REQUIRED to run the project. The
		easiest way to use this is to start up nios2-ide, click on
		File -> Switch Workspace, and point it to this directory.
		The path to system_0.ptf might be hardcoded in the syslib
		part of the project (inside the system.stf file).
vhd		The meat of the project. This folder contains all the VHDL
|		files that we coded. It has several subdirectories.
|		This folder contains AES128_toplevel.vhd, which is, as the name
|		suggests, the top level entity in the project.
|-AES		The decryption HDL, custom coded from scratch. See the report
|		for a complete understanding of AES, as well as references.
|-altera_up_avalon_character_lcd	This is the Altera-supplied LCD
|		controller to show the user's key on the 16x2 character LCD 
|		as the user is typing it.
|-de2_ps2	The keyboard controller, taken from Lab 2, mostly unchanged.
|		However, the software part has been rewritten from scratch.
|-SPI		The SPI SD/MMC card interface controller. See report for
|		details and references on this proprietary protocol.
\-vgasram	The VGA and SRAM supercontroller and submodules. The SRAM
		controller has implemented the NO/GO switch (see report).
		
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2. Requirements

Quartus, Nios-II IDE. There is a command-line workaround listed under section 3.

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3. Compilation

There is a command-line option to send the project SOF/
CDF file to the board. The precompiled files are in the 'precompiled' folder.
The command is:
	quartus_pgm -c USB-Blaster - aes128_sd.cdf

There is also a command-line method to send the precompiled Nios-II project to
the board:
	nios2-download -r projectv3.elf
Should you get an error stating that nios2-elf-objcopy was not found, add this
path to the environment variable by typing this at the command line, and pray:

PATH=$PATH:/opt/e4840/altera7.2/nios2eds/bin/nios2-gnutools/H-i686-pc-linux-gnu/bin

Note: This path might have changed since the time this readme was written.	
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4. Execution

Follow the command-line instructions, or play it safe and run the project from
inside Quartus and Nios. If command-line options are not used, use the Quartus
Programmer to program the hardware, and use Run as Hardware command within
Nios2-Ide.   
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5. Summary

This code is for the the course project of CSEE4840: Embedded Systems Design.
Comments/Suggestion/Questions are welcome. Don't hesitate to contact the
authors in the following order: 
am2993@columbia.edu, syr9@columbia.edu,
sb2784@columbia.edu, lc2454@columbia.edu.