Altera SOPC Builder Version 12.10 Build 177
Copyright (c) 1999-2009 Altera Corporation.  All rights reserved.


# 2013.02.11 22:07:32 (*) mk_custom_sdk starting
# 2013.02.11 22:07:32 (*) Reading project /home/user2/spring13/asc2171/Downloads/Lab2CSEE4840/nios_0.ptf.

# 2013.02.11 22:07:32 (*) Finding all CPUs
# 2013.02.11 22:07:32 (*) Finding all available components
# 2013.02.11 22:07:32 (*) Reading /home/user2/spring13/asc2171/Downloads/Lab2CSEE4840/.sopc_builder/install.ptf

# 2013.02.11 22:07:32 (*) Found 69 components

# 2013.02.11 22:07:33 (*) Finding all peripherals

# 2013.02.11 22:07:33 (*) Finding software components

# 2013.02.11 22:07:35 (*) (Legacy SDK Generation Skipped)
# 2013.02.11 22:07:35 (*) (All TCL Script Generation Skipped)
# 2013.02.11 22:07:35 (*) (No Libraries Built)
# 2013.02.11 22:07:35 (*) (Contents Generation Skipped)
# 2013.02.11 22:07:35 (*) mk_custom_sdk finishing

# 2013.02.11 22:07:35 (*) Starting generation for system: nios_0.

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# 2013.02.11 22:07:37 (*) Running Generator Program for cpu_0

# 2013.02.11 22:07:38 (*) Starting Nios II generation
# 2013.02.11 22:07:38 (*)   Checking for plaintext license.
# 2013.02.11 22:07:40 (*)   Couldn't query license setup in Quartus directory /opt/altera/altera12.1/quartus
# 2013.02.11 22:07:40 (*)   Defaulting to contents of LM_LICENSE_FILE environment variable
# 2013.02.11 22:07:40 (*)   Plaintext license not found.
# 2013.02.11 22:07:40 (*)   Checking for encrypted license (non-evaluation).
# 2013.02.11 22:07:42 (*)   Couldn't query license setup in Quartus directory /opt/altera/altera12.1/quartus
# 2013.02.11 22:07:42 (*)   Defaulting to contents of LM_LICENSE_FILE environment variable
# 2013.02.11 22:07:42 (*)   Encrypted license found.  SOF will not be time-limited.
# 2013.02.11 22:07:42 (*)   Getting CPU configuration settings
# 2013.02.11 22:07:42 (*)   Elaborating CPU configuration settings
# 2013.02.11 22:07:42 (*)   Creating all objects for CPU
# 2013.02.11 22:07:42 (*)     Testbench
# 2013.02.11 22:07:42 (*)     Instruction decoding
# 2013.02.11 22:07:42 (*)       Instruction fields
# 2013.02.11 22:07:42 (*)       Instruction decodes
# 2013.02.11 22:07:43 (*)       Signals for RTL simulation waveforms
# 2013.02.11 22:07:43 (*)       Instruction controls
# 2013.02.11 22:07:44 (*)     Pipeline frontend
# 2013.02.11 22:07:44 (*)     Pipeline backend
# 2013.02.11 22:07:47 (*)   Generating HDL from CPU objects
# 2013.02.11 22:07:53 (*)   Creating encrypted HDL
# 2013.02.11 22:07:54 (*) Done Nios II generation

# 2013.02.11 22:07:55 (*) Running Generator Program for jtag_uart_0

# 2013.02.11 22:07:56 (*) Running Generator Program for sdram_0

# 2013.02.11 22:07:58 (*) Running Generator Program for cfi_flash_0

# 2013.02.11 22:07:59 (*) Running Generator Program for timer_0

# 2013.02.11 22:08:00 (*) Running Generator Program for sysid

# 2013.02.11 22:08:01 (*) Running Generator Program for uart_0

# 2013.02.11 22:08:03 (*) Running Generator Program for timer_1

# 2013.02.11 22:08:04 (*) Running Generator Program for lcd_16207_0

# 2013.02.11 22:08:05 (*) Running Generator Program for led_green

# 2013.02.11 22:08:06 (*) Running Generator Program for led_red

# 2013.02.11 22:08:07 (*) Running Generator Program for button_pio

# 2013.02.11 22:08:09 (*) Running Generator Program for switch_pio

# 2013.02.11 22:08:10 (*) Running Generator Program for SEG7_Display

# 2013.02.11 22:08:13 (*) Running Generator Program for sram_0

# 2013.02.11 22:08:16 (*) Running Generator Program for I2C_0

# 2013.02.11 22:08:19 (*) Running Generator Program for epcs_controller

# 2013.02.11 22:08:20 (*) Running Generator Program for ISP1362

# 2013.02.11 22:08:21 (*) updating 
# 2013.02.11 22:08:21 (*) ISP1362
# 2013.02.11 22:08:21 (*) done updating 
# 2013.02.11 22:08:21 (*) ISP1362
# 2013.02.11 22:08:21 (*) output file (/home/user2/spring13/asc2171/Downloads/Lab2CSEE4840/ISP1362.v) created


# 2013.02.11 22:08:22 (*) Running Generator Program for DM9000A

# 2013.02.11 22:08:25 (*) Running Generator Program for ps2_0

# 2013.02.11 22:08:28 (*) Running Generator Program for binary_vga_controller_0

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# 2013.02.11 22:08:32 (*) Running Test Generator Program for sdram_0

# 2013.02.11 22:08:33 (*) Making arbitration and system (top) modules.

# 2013.02.11 22:08:42 (*) Generating Quartus symbol for top level: nios_0

# 2013.02.11 22:08:42 (*) Generating Symbol /home/user2/spring13/asc2171/Downloads/Lab2CSEE4840/nios_0.bsf

# 2013.02.11 22:08:42 (*) Creating command-line system-generation script: /home/user2/spring13/asc2171/Downloads/Lab2CSEE4840/nios_0_generation_script

# 2013.02.11 22:08:42 (*) Running setup for HDL simulator: modelsim


# 2013.02.11 22:08:42 (*) Completed generation for system: nios_0.
# 2013.02.11 22:08:42 (*) THE FOLLOWING SYSTEM ITEMS HAVE BEEN GENERATED:
  SOPC Builder database : /home/user2/spring13/asc2171/Downloads/Lab2CSEE4840/nios_0.ptf 
  System HDL Model : /home/user2/spring13/asc2171/Downloads/Lab2CSEE4840/nios_0.v 
  System Generation Script : /home/user2/spring13/asc2171/Downloads/Lab2CSEE4840/nios_0_generation_script 

# 2013.02.11 22:08:42 (*) SUCCESS: SYSTEM GENERATION COMPLETED.


Press 'Exit' to exit.
