ADDRESS_REG_B=CLOCK0
CLOCK_ENABLE_INPUT_A=BYPASS
CLOCK_ENABLE_INPUT_B=BYPASS
CLOCK_ENABLE_OUTPUT_A=BYPASS
CLOCK_ENABLE_OUTPUT_B=BYPASS
INDATA_REG_B=CLOCK0
INTENDED_DEVICE_FAMILY="Cyclone II"
LPM_TYPE=altsyncram
NUMWORDS_A=32
NUMWORDS_B=32
OPERATION_MODE=BIDIR_DUAL_PORT
OUTDATA_ACLR_A=NONE
OUTDATA_ACLR_B=NONE
OUTDATA_REG_A=UNREGISTERED
OUTDATA_REG_B=UNREGISTERED
POWER_UP_UNINITIALIZED=FALSE
READ_DURING_WRITE_MODE_MIXED_PORTS=DONT_CARE
WIDTHAD_A=5
WIDTHAD_B=5
WIDTH_A=7
WIDTH_B=7
WIDTH_BYTEENA_A=1
WIDTH_BYTEENA_B=1
WRCONTROL_WRADDRESS_REG_B=CLOCK0
DEVICE_FAMILY="Cyclone II"
address_a
address_b
clock0
data_a
data_b
wren_a
wren_b
q_a
q_b
