{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1 1366318989363 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 32-bit " "Running Quartus II 32-bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 12.1 Build 177 11/07/2012 SJ Full Version " "Version 12.1 Build 177 11/07/2012 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1 1366318989365 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Apr 18 17:03:08 2013 " "Processing started: Thu Apr 18 17:03:08 2013" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1 1366318989365 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1 1366318989365 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off NES_FSM -c NES_FSM " "Command: quartus_map --read_settings_files=on --write_settings_files=off NES_FSM -c NES_FSM" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1 1366318989366 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "2 2 " "Parallel compilation is enabled and will use 2 of the 2 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "" 0 -1 1366318991067 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "controller.vhd 2 1 " "Found 2 design units, including 1 entities, in source file controller.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 controller-arch " "Found design unit 1: controller-arch" {  } { { "controller.vhd" "" { Text "/home/user3/spring13/ie2147/Desktop/NES_FSM/controller.vhd" 18 -1 0 } }  } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "" 0 -1 1366318992230 ""} { "Info" "ISGN_ENTITY_NAME" "1 controller " "Found entity 1: controller" {  } { { "controller.vhd" "" { Text "/home/user3/spring13/ie2147/Desktop/NES_FSM/controller.vhd" 5 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1 1366318992230 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1 1366318992230 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "fsm_top.vhd 2 1 " "Found 2 design units, including 1 entities, in source file fsm_top.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 fsm_top-datapath " "Found design unit 1: fsm_top-datapath" {  } { { "fsm_top.vhd" "" { Text "/home/user3/spring13/ie2147/Desktop/NES_FSM/fsm_top.vhd" 31 -1 0 } }  } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "" 0 -1 1366318992237 ""} { "Info" "ISGN_ENTITY_NAME" "1 fsm_top " "Found entity 1: fsm_top" {  } { { "fsm_top.vhd" "" { Text "/home/user3/spring13/ie2147/Desktop/NES_FSM/fsm_top.vhd" 14 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1 1366318992237 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1 1366318992237 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "controller_tb.vhd 2 1 " "Found 2 design units, including 1 entities, in source file controller_tb.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 controller_tb-a1 " "Found design unit 1: controller_tb-a1" {  } { { "controller_tb.vhd" "" { Text "/home/user3/spring13/ie2147/Desktop/NES_FSM/controller_tb.vhd" 8 -1 0 } }  } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "" 0 -1 1366318992245 ""} { "Info" "ISGN_ENTITY_NAME" "1 controller_tb " "Found entity 1: controller_tb" {  } { { "controller_tb.vhd" "" { Text "/home/user3/spring13/ie2147/Desktop/NES_FSM/controller_tb.vhd" 5 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1 1366318992245 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1 1366318992245 ""}
{ "Info" "ISGN_START_ELABORATION_TOP" "controller " "Elaborating entity \"controller\" for the top level hierarchy" {  } {  } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 -1 1366318992410 ""}
{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "buttons controller.vhd(24) " "Verilog HDL or VHDL warning at controller.vhd(24): object \"buttons\" assigned a value but never read" {  } { { "controller.vhd" "" { Text "/home/user3/spring13/ie2147/Desktop/NES_FSM/controller.vhd" 24 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "" 0 -1 1366318992414 "|controller"}
{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" {  } {  } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "" 0 -1 1366318996788 ""}  } {  } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "" 0 -1 1366318996788 ""}
{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "1 " "Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "data " "No output dependent on input pin \"data\"" {  } { { "controller.vhd" "" { Text "/home/user3/spring13/ie2147/Desktop/NES_FSM/controller.vhd" 10 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1 1366318996881 "|controller|data"}  } {  } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "" 0 -1 1366318996881 ""}
{ "Info" "ICUT_CUT_TM_SUMMARY" "222 " "Implemented 222 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "2 " "Implemented 2 input pins" {  } {  } 0 21058 "Implemented %1!d! input pins" 0 0 "" 0 -1 1366318996882 ""} { "Info" "ICUT_CUT_TM_OPINS" "50 " "Implemented 50 output pins" {  } {  } 0 21059 "Implemented %1!d! output pins" 0 0 "" 0 -1 1366318996882 ""} { "Info" "ICUT_CUT_TM_LCELLS" "170 " "Implemented 170 logic cells" {  } {  } 0 21061 "Implemented %1!d! logic cells" 0 0 "" 0 -1 1366318996882 ""}  } {  } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 -1 1366318996882 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 3 s Quartus II 32-bit " "Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "361 " "Peak virtual memory: 361 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1 1366318997249 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Apr 18 17:03:17 2013 " "Processing ended: Thu Apr 18 17:03:17 2013" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1 1366318997249 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Elapsed time: 00:00:09" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1 1366318997249 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:06 " "Total CPU time (on all processors): 00:00:06" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1 1366318997249 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1 1366318997249 ""}
